Issued Patents All Time
Showing 25 most recent of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11995447 | Quick predictor override and update by a BTAC | — | 2024-05-28 |
| 11783050 | Spectre fixes with predictor mode tag | — | 2023-10-10 |
| 11614944 | Small branch predictor escape | — | 2023-03-28 |
| 11567776 | Branch density detection for prefetcher | Brent Bean | 2023-01-31 |
| 11500643 | Spectre fixes with indirect valid table | Timothy Jon Sulzbach | 2022-11-15 |
| 11461103 | Dual branch execute and table update with single port | — | 2022-10-04 |
| 11360774 | Dual branch format | John L. Duncan | 2022-06-14 |
| 11334491 | Side cache array for greater fetch bandwidth | John L. Duncan | 2022-05-17 |
| 11275686 | Adjustable write policies controlled by feature control registers | — | 2022-03-15 |
| 11113067 | Speculative branch pattern update | — | 2021-09-07 |
| 8838938 | Prefix accumulation for efficient processing of instructions with multiple prefix bytes | John L. Duncan | 2014-09-16 |
| 8832418 | Efficient branch target address cache entry replacement | — | 2014-09-09 |
| 8612727 | Apparatus and method for marking start and end bytes of instructions in a stream of instruction bytes in a microprocessor having an instruction set architecture in which instructions may include a length-modifying prefix | John L. Duncan | 2013-12-17 |
| 8533434 | Apparatus for efficiently determining instruction length instruction within a stream of x86 instruction bytes | John L. Duncan | 2013-09-10 |
| 8473726 | Bad branch prediction detection, marking, and accumulation for faster instruction stream processing | — | 2013-06-25 |
| 8438367 | Instruction extraction through prefix accumulation | John L. Duncan | 2013-05-07 |
| 8335910 | Early release of cache data with start/end marks when instructions are only partially present | — | 2012-12-18 |
| 8281110 | Out-of-order microprocessor with separate branch information circular queue table tagged by branch instructions in reorder buffer to reduce unnecessary space in buffer | Brent Bean | 2012-10-02 |
| 7707397 | Variable group associativity branch target address cache delivering multiple target addresses per cache line | G. Glenn Henry | 2010-04-27 |
| 7631172 | Apparatus and method for selectively overriding return stack prediction in response to detection of non-standard return sequence | G. Glenn Henry | 2009-12-08 |
| 7398377 | Apparatus and method for target address replacement in speculative branch target address cache | Terry Parks | 2008-07-08 |
| 7237098 | Apparatus and method for selectively overriding return stack prediction in response to detection of non-standard return sequence | G. Glenn Henry | 2007-06-26 |
| 7234045 | Apparatus and method for handling BTAC branches that wrap across instruction cache lines | G. Glenn Henry, Brent Bean | 2007-06-19 |
| 7203824 | Apparatus and method for handling BTAC branches that wrap across instruction cache lines | Brent Bean, G. Glenn Henry | 2007-04-10 |
| 7200740 | Apparatus and method for speculatively performing a return instruction in a microprocessor | G. Glenn Henry | 2007-04-03 |