RR

Robert A. Rasmussen

VF Vectra Fitness: 10 patents #2 of 12Top 20%
IBM: 3 patents #26,272 of 70,183Top 40%
UN Unknown: 2 patents #12,644 of 83,584Top 20%
MC Mr Industrial Co.: 1 patents #2 of 9Top 25%
📍 Redmond, WA: #767 of 8,547 inventorsTop 9%
🗺 Washington: #6,154 of 76,902 inventorsTop 9%
Overall (All Time): #300,003 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDate
8550964 Resistance training apparatus and methods A. Buell Ish, III, L. Kent Lines, Mark Tollison 2013-10-08
8251877 Systems and methods for functional training exercises having function-specific user interfaces A. Buell Ish, III 2012-08-28
7909742 Functional training exercise apparatus and methods A. Buell Ish, III, L. Kent Lines, Jose Sanchez 2011-03-22
D576230 Golf club style functional training handle for exercise machines A. Buell Ish, III 2008-09-02
D576231 Baseball bat style functional training handle for exercise machines A. Buell Ish, III 2008-09-02
D576232 Racquet style functional training handle for exercise machines A. Buell Ish, III 2008-09-02
D576233 Baseball style functional training handle for exercise machines A. Buell Ish, III 2008-09-02
D576234 Hockey stick style functional training handle for exercise machines 2008-09-02
D329563 Storage rack for dumbbells 1992-09-22
D320247 Physical exerciser Jeffrey B. Johnson, Arthur B. Ish, III, Loyd C. Moore, William MacLean 1991-09-24
4809972 Exercise machine with multiple exercise stations Jeffrey B. Johnson, William MacLean, Arthur B. Ish III 1989-03-07
4756523 Exercise rowing machine with seat carriage lock 1988-07-12
4608669 Self contained array timing Walter S. Klara, Theodore W. Kwap, Victor Marcello 1986-08-26
4541627 Exercise rowing machine W. Douglas MacLean 1985-09-17
4509008 Method of concurrently testing each of a plurality of interconnected integrated circuit chips Sumit DasGupta, Matthew C. Graf, Thomas W. Williams 1985-04-02
4503386 Chip partitioning aid (CPA)-A structure for test pattern generation for large logic networks Sumit DasGupta, Matthew C. Graf, Thomas W. Williams 1985-03-05