Issued Patents All Time
Showing 126–150 of 222 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5576232 | Fabrication process for flash memory in which channel lengths are controlled | — | 1996-11-19 |
| 5576228 | Method for fabricating polycide gate MOSFET devices | Ancheor Chen | 1996-11-19 |
| 5571739 | Method for fabricating a read-only-memory (ROM) using a new ROM code mask process | — | 1996-11-05 |
| 5569946 | Flash memory cell with self-aligned tunnel dielectric area above LDD structure | — | 1996-10-29 |
| 5569945 | Stepped floating gate EPROM device | — | 1996-10-29 |
| 5564180 | Method of fabricating DRAM cell capacitor | Anchor Chen | 1996-10-15 |
| 5556799 | Process for fabricating a flash EEPROM | — | 1996-09-17 |
| 5556798 | Method for isolating non-volatile memory cells | — | 1996-09-17 |
| 5554551 | Method of manufacture of an EEPROM cell with self-aligned thin dielectric area | — | 1996-09-10 |
| 5550075 | Ion implanted programmable cell for read only memory applications | Chen-Chung Hsu | 1996-08-27 |
| 5543344 | Method of making programmable read-only memory | Chen-Chung Hsu | 1996-08-06 |
| 5539234 | Bottom gate mask ROM device | — | 1996-07-23 |
| 5538913 | Process for fabricating MOS transistors having full-overlap lightly-doped drain structure | — | 1996-07-23 |
| 5536673 | Method for making dynamic random access memory (DRAM) cells having large capacitor electrode plates for increased capacitance | Jason Jenq | 1996-07-16 |
| 5534447 | Process for fabricating MOS LDD transistor with pocket implant | — | 1996-07-09 |
| 5529942 | Self-aligned coding process for mask ROM | Chen-Chiu Hsue | 1996-06-25 |
| 5529943 | Method of making buried bit line ROM with low bit line resistance | Chen-Chiu Hsue | 1996-06-25 |
| 5529946 | Process of fabricating DRAM storage capacitors | — | 1996-06-25 |
| 5525535 | Method for making doped well and field regions on semiconductor substrates for field effect transistors using liquid phase deposition of oxides | — | 1996-06-11 |
| 5523251 | Method for fabricating a self aligned mask ROM | — | 1996-06-04 |
| 5523542 | Method for making dynamic random access memory cell capacitor | Anchor Chen | 1996-06-04 |
| 5512770 | MOSFET device structure three spaced-apart deep boron implanted channel regions aligned with gate electrode of NMOSFET device | — | 1996-04-30 |
| 5512507 | Process for post metal coding of a ROM, by gate etch | Ming Yang | 1996-04-30 |
| 5512503 | Method of manufacture of a split gate flash EEPROM memory cell | — | 1996-04-30 |
| 5510288 | Buried bit line mask ROM process | — | 1996-04-23 |