Issued Patents All Time
Showing 101–125 of 222 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5667940 | Process for creating high density integrated circuits utilizing double coating photoresist mask | Chen-Chiu Hsue | 1997-09-16 |
| 5665624 | Method for fabricating trench/stacked capacitors on DRAM cells with increased capacitance | — | 1997-09-09 |
| 5665621 | Read-only-memory process with self-aligned coding | — | 1997-09-09 |
| 5661326 | Mask ROM process with self-aligned ROM code implant | — | 1997-08-26 |
| 5661081 | Method of bonding an aluminum wire to an intergrated circuit bond pad | Chen-Chiu Hsue, Sun-Chieh Chien, Anchor Chen | 1997-08-26 |
| 5646056 | Method of fabricating ultra-large-scale integration metal-oxide semiconductor field effect transistor | Chih-Hung Lin, Hwi-Huang Chen | 1997-07-08 |
| 5646059 | Process for fabricating non-volatile memory cells having improved voltage coupling ratio by utilizing liquid phase | Yau-Kae Sheu | 1997-07-08 |
| 5646436 | Read only memory (ROM) device produced by self-aligned implantation | Chen-Chiu Hsue, Chen-Hui Chung | 1997-07-08 |
| 5643816 | High-density programmable read-only memory and the process for its fabrication | Chen-Chung Hsu | 1997-07-01 |
| 5635749 | High performance field effect transistor with lai region | — | 1997-06-03 |
| 5635415 | Method of manufacturing buried bit line flash EEPROM memory cell | — | 1997-06-03 |
| 5631482 | Flash EEPROM memory cell with polysilicon source/drain | — | 1997-05-20 |
| 5631481 | Flat-cell mask ROM integrated circuit | Chen-Chiu Hsue | 1997-05-20 |
| 5627091 | Mask ROM process for making a ROM with a trench shaped channel | — | 1997-05-06 |
| 5625600 | Flash memory array with self-limiting erase | — | 1997-04-29 |
| 5625213 | Top floating-gate flash EEPROM structure | Chen-Chiu Hsue | 1997-04-29 |
| 5616946 | VLSI ROM programmed by selective diode formation | Chen-Chung Hsu | 1997-04-01 |
| 5614746 | Structure and process of manufacture of split gate flash memory cell | Hwi-Huang Chen | 1997-03-25 |
| 5596230 | Interconnection with self-aligned via plug | — | 1997-01-21 |
| 5585656 | High coupling ratio of flash memory | Chen-Chiu Hsue | 1996-12-17 |
| 5585303 | Method for manufacturing a stacked/trench DRAM capacitor | J. S. Jason Jenq | 1996-12-17 |
| 5578857 | Double poly high density buried bit line mask ROM | Ming-Tzong Yang, Chen-Chiu Hsue | 1996-11-26 |
| 5576993 | Flash memory array with self-limiting erase | — | 1996-11-19 |
| 5576574 | Mosfet with fully overlapped lightly doped drain structure and method for manufacturing same | — | 1996-11-19 |
| 5576235 | ROM coding process with self-aligned implantation and the ROM produced thereby | Chen-Chiu Hsue, Chen-Hui Chung | 1996-11-19 |