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Method and system for testing a controller of a hard disk drive |
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Accumulator for non-return to zero (NRZ) linear feedback shift register (LFSR) in controller for disk drive |
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Accumulator for non-return to zero (NRZ) linear feedback shift register (LFSR) in controller for disk drive |
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Method for computing buffer ECC |
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Accumulator for non-return to zero (NRZ) linear feedback shift register (LFSR) in controller for disk drive |
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System and method for performing parity checks in disk storage systems |
— |
2009-07-07 |
| 7543214 |
Method and system for performing CRC |
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System and method for performing parity checks in disk storage system |
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2006-09-19 |
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Dual bus system with multiple processors having data coherency maintenance |
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1998-09-15 |
| 5553259 |
Apparatus and method for synchronizing the simultaneous loading of cache program word addresses in dual slice registers |
David Kalish, Saul Barajas |
1996-09-03 |
| 5553263 |
Cache memory system with fault tolerance having concurrently operational cache controllers processing disjoint groups of memory |
David Kalish, Saul Barajas |
1996-09-03 |
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Configurable network using dual system busses with common protocol compatible for store-through and non-store-through cache memories |
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1996-04-23 |
| 5509127 |
Transmission logic apparatus for dual bus network |
Wayne C. Datwyler |
1996-04-16 |
| 5495585 |
Programmable timing logic system for dual bus interface |
Wayne C. Datwyler |
1996-02-27 |
| 5444860 |
Translator system for message transfers between digital units operating on different message protocols and different clock rates |
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1995-08-22 |
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Receiving control logic system for dual bus network |
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1995-08-15 |
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Dual bus interface transfer system for central processing module |
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1995-04-04 |
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Inhibit write apparatus and method for preventing bus lockout |
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1994-03-08 |
| 5293621 |
Varying wait interval retry apparatus and method for preventing bus lockout |
Theodore C. White, Jayesh V. Sheth, Dan T. Tran |
1994-03-08 |
