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Method and storage device for isolating and preventing access to processor and memory used in decryption of text |
Siu-Hung Fred Au, Gregory Burd, Leonard J. Galasso, Tze Lei Poo, Minda Zhang |
2016-02-02 |
| 8543838 |
Cryptographic module with secure processor |
Siu-Hung Fred Au, Gregory Burd, Leonard J. Galasso, Tze Lei Poo, Minda Zhang |
2013-09-24 |
| 8023217 |
Method and system for read gate timing control for storage controllers |
Daniel R. Pinvidic, Hunardi Hudiono |
2011-09-20 |
| 7609468 |
Method and system for read gate timing control for storage controllers |
Daniel R. Pinvidic, Hunardi Hudiono |
2009-10-27 |
| 5598421 |
Method and system for tracking the state of each one of multiple JTAG chains used in testing the logic of intergrated circuits |
Dan T. Tran, Long Ha |
1997-01-28 |
| 5553249 |
Dual bus adaptable data path interface system |
Dan T. Tran, Long Ha |
1996-09-03 |
| 5509127 |
Transmission logic apparatus for dual bus network |
Paul B. Ricci |
1996-04-16 |
| 5495585 |
Programmable timing logic system for dual bus interface |
Paul B. Ricci |
1996-02-27 |
| 5495573 |
Error logging system with clock rate translation |
Long Ha, Dan T. Tran |
1996-02-27 |
| 5444860 |
Translator system for message transfers between digital units operating on different message protocols and different clock rates |
Paul B. Ricci |
1995-08-22 |
| 5442754 |
Receiving control logic system for dual bus network |
Paul B. Ricci |
1995-08-15 |
| 5404462 |
Dual bus interface transfer system for central processing module |
Paul B. Ricci |
1995-04-04 |
