Issued Patents All Time
Showing 25 most recent of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9195538 | System and method for in-line error correction for storage systems | Yujun Si, Stanley Ka Fai Cheong | 2015-11-24 |
| 9037764 | Method and apparatus for efficiently transferring data in bursts from a storage device to a host | Stanley Ka Fai Cheong, Lim Hudiono, William W. Dennin, Chau C. Tran | 2015-05-19 |
| 8713224 | System and method for transferring data in storage controllers | William W. Dennin, Angel G. Perozo | 2014-04-29 |
| 8572302 | Controller for storage device with improved burst efficiency | Stanley Ka Fai Cheong, Lim Hudiono, William W. Dennin, Chau C. Tran | 2013-10-29 |
| 8417900 | Power save module for storage controllers | Angel G. Perozo, William W. Dennin, Aurelio J. Cruz | 2013-04-09 |
| 8402323 | System and method for in-line error correction for storage systems | Yujun Si, Stanley Ka Fai Cheong | 2013-03-19 |
| 8166217 | System and method for reading and writing data using storage controllers | William W. Dennin, Angel G. Perozo | 2012-04-24 |
| 8122299 | System and method for in-line error correction for storage systems | Yujun Si, Stanley Ka Fai Cheong | 2012-02-21 |
| 8095717 | System and method for configuration register synchronization | — | 2012-01-10 |
| 8019957 | Method and system for automatic calibration of a DQS signal in a storage controller | Thanh Hai Le | 2011-09-13 |
| 7921243 | System and method for a DDR SDRAM controller | — | 2011-04-05 |
| 7904656 | Controller for hard disk drive having DWFT (data wedge format table) cache with high-priority initial cache fill | William W. Dennin, Lim Hudiono | 2011-03-08 |
| 7865784 | Write validation | William W. Dennin, Joseph G. Kriscunas | 2011-01-04 |
| 7793063 | Method and system for automatic calibration of a DQS signal in a storage controller | Thanh Hai Le | 2010-09-07 |
| 7596053 | Integrated memory controller | Dinesh Jayabharathi | 2009-09-29 |
| 7535791 | Integrated memory controller | Dinesh Jayabharathi | 2009-05-19 |
| 7386661 | Power save module for storage controllers | Angel G. Perozo, William W. Dennin, Aurelio J. Cruz | 2008-06-10 |
| 7287102 | System and method for concatenating data | William W. Dennin, Angel G. Perozo | 2007-10-23 |
| 7286441 | Integrated memory controller | Dinesh Jayabharathi | 2007-10-23 |
| 7120084 | Integrated memory controller | Dinesh Jayabharathi | 2006-10-10 |
| 7007114 | System and method for padding data blocks and/or removing padding from data blocks in storage controllers | William W. Dennin, Angel G. Perozo | 2006-02-28 |
| 6961877 | System and method for in-line error correction for storage systems | Yujun Si, Stanley Ka Fai Cheong | 2005-11-01 |
| 6401149 | Methods for context switching within a disk controller | William W. Dennin | 2002-06-04 |
| 6330626 | Systems and methods for a disk controller memory architecture | William W. Dennin | 2001-12-11 |
| 5845324 | Dual bus network cache controller system having rapid invalidation cycles and reduced latency for cache access | Javesh Vrajlal Sheth | 1998-12-01 |