Issued Patents All Time
Showing 26–50 of 153 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8648605 | Sensor, sensor system, portable sensor system, method of analyzing metal ions, mounting substrate, method of analyzing plating preventing chemical species, method of analyzing produced compound, and method of analyzing monovalent copper chemical species | Hidehiro Nakamura, Tooru Nakamura, Yuji Kawanishi | 2014-02-11 |
| 8450799 | Field effect transistor formed on an insulating substrate and integrated circuit thereof | Hisashi Hasegawa, Hiroaki Takasu, Jun Osanai | 2013-05-28 |
| 8223548 | Memory device with reduced programming voltage method of reduction of programming voltage and method of reading such memory device | Kazuhiko Matsumoto, Takafumi Kamimura | 2012-07-17 |
| 8174871 | Memory cell array | Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Masatoshi Ono | 2012-05-08 |
| 8094484 | Memory cell array | Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Masatoshi Ono | 2012-01-10 |
| 8012835 | Method of high voltage operation of field effect transistor | Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai | 2011-09-06 |
| 7816212 | Method of high voltage operation of a field effect transistor | Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai | 2010-10-19 |
| 7771124 | Bearing apparatus for a wheel of vehicle | Koichi Okada, Kenichi Iwamoto, Takashi Koike | 2010-08-10 |
| 7592576 | Optical sensor array, sensing method and circuit therefore, and device and apparatus thereby | Yasushi Nagamune, Toshitaka Ohta | 2009-09-22 |
| 7545018 | High voltage operating field effect transistor, bias circuit therefor and high voltage circuit thereof | Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai | 2009-06-09 |
| 7473957 | Floating gate non-volatile memory | Shoji Nakanishi, Sumitaka Goto | 2009-01-06 |
| 7432568 | High voltage operating field effect transistor, and bias circuit therefor and high voltage circuit thereof | Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai | 2008-10-07 |
| 7282763 | Field effect transistor formed on an insulating substrate and integrated circuit thereof | Hisashi Hasegawa, Hiroaki Takasu, Jun Osanai | 2007-10-16 |
| 7211867 | Thin film memory, array, and operation method and manufacture method therefor | Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai | 2007-05-01 |
| 7190032 | Insulated gate transistor | Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai | 2007-03-13 |
| 7149126 | Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory | Seiki Ogura, Tomoko Ogura | 2006-12-12 |
| RE39120 | Ceramic sintered product and process for producing the same | Yoshihisa Sechi, Masahiro Sato, Hiroshi Aida, Shoji Kohsaka | 2006-06-06 |
| 6961113 | Exposure method and apparatus | Osamu Yamashita, Masaya Iwasaki | 2005-11-01 |
| 6949777 | Method of controlling insulated gate transistor | Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai | 2005-09-27 |
| 6857950 | Polishing apparatus, semiconductor device manufacturing method using the polishing apparatus, and semiconductor device manufactured by the manufacturing method | Yutaka Uda | 2005-02-22 |
| 6804149 | Nonvolatile memory cell, operating method of the same and nonvolatile memory array | Seiki Ogura | 2004-10-12 |
| 6686632 | Dual-bit multi-level ballistic MONOS memory | Seiki Ogura, Tomoko Ogura | 2004-02-03 |
| 6646719 | Support assembly for an exposure apparatus | Martin E. Lee, Bausan Yuan | 2003-11-11 |
| 6633364 | Exposure apparatus, exposure method, and device manufacturing method | — | 2003-10-14 |
| 6534812 | Memory cell with stored charge on its gate and a resistance element having non-linear resistance elements | Mikio Mukai | 2003-03-18 |