VU

Vladimir A. Ukraintsev

TI Texas Instruments: 7 patents #2,108 of 12,488Top 20%
DS Dcg Systems: 3 patents #11 of 83Top 15%
FE Fei Efa: 2 patents #5 of 27Top 20%
FE Fei: 1 patents #375 of 681Top 60%
📍 Allen, TX: #211 of 1,376 inventorsTop 20%
🗺 Texas: #11,465 of 125,132 inventorsTop 10%
Overall (All Time): #377,443 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
10539589 Through process flow intra-chip and inter-chip electrical analysis and process control using in-line nanoprobing Israel Niv, Ronen Benzion 2020-01-21
10175295 Optical nanoprobing of integrated circuits Mike Berkmyre 2019-01-08
9891280 Probe-based data collection system with adaptive mode of probing controlled by local sample properties Richard Stallcup, Sergiy Pryadkin, Mike Berkmyre, John Sanders 2018-02-13
9506947 System and method for non-contact microscopy for three-dimensional pre-characterization of a sample for fast and non-destructive on sample navigation during nanoprobing Richard Stallcup, Sergiy Pryadkin, Mike Berkmyre, John Sanders 2016-11-29
9347897 Characterizing dimensions of structures via scanning probe microscopy Duncan Rogers 2016-05-24
9057740 Probe-based data collection system with adaptive mode of probing Richard Stallcup, Sergiy Pryadkin, Mike Berkmyre, John Sanders 2015-06-16
9006001 Simple scatterometry structure for Si recess etch control Craig Hall 2015-04-14
8895923 System and method for non-contact microscopy for three-dimensional pre-characterization of a sample for fast and non-destructive on sample navigation during nanoprobing Richard Stallcup, Sergiy Pryadkin, Mike Berkmyre, John Sanders 2014-11-25
8305097 Method for calibrating an inspection tool 2012-11-06
7921465 Nanotip repair and characterization using field ion microscopy 2011-04-05
7797991 Rocking Y-shaped probe for critical dimension atomic force microscopy 2010-09-21
7381950 Characterizing dimensions of structures via scanning probe microscopy Duncan Rogers 2008-06-03
6967349 Method for fabricating a multi-level integrated circuit having scatterometry test structures stacked over same footprint area Thomas D. Bonifield 2005-11-22