Issued Patents All Time
Showing 201–225 of 249 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5404327 | Memory device with end of cycle precharge utilizing write signal and data transition detectors | — | 1995-04-04 |
| 5396110 | Pulse generator circuit and method | — | 1995-03-07 |
| 5376846 | Temperature compensation circuit and method of operation | — | 1994-12-27 |
| 5361033 | On chip bi-stable power-spike detection circuit | — | 1994-11-01 |
| 5325054 | Method and system for screening reliability of semiconductor circuits | — | 1994-06-28 |
| 5313422 | Digitally controlled delay applied to address decoder for write vs. read | — | 1994-05-17 |
| 5310694 | Method for forming a transistor device with resistive coupling | — | 1994-05-10 |
| 5215931 | Method of making extended body contact for semiconductor over insulator transistor | — | 1993-06-01 |
| 5214610 | Memory with selective address transition detection for cache operation | — | 1993-05-25 |
| 5210715 | Memory circuit with extended valid data output time | — | 1993-05-11 |
| 5208489 | Multiple compound domino logic circuit | — | 1993-05-04 |
| 5206533 | Transistor device with resistive coupling | — | 1993-04-27 |
| 5204990 | Memory cell with capacitance for single event upset protection | Terence G. W. Blake | 1993-04-20 |
| 5198710 | Bi-directional digital noise glitch filter | — | 1993-03-30 |
| 5193076 | Control of sense amplifier latch timing | — | 1993-03-09 |
| 5185280 | Method of fabricating a SOI transistor with pocket implant and body-to-source (BTS) contact | Gordon P. Pollack | 1993-02-09 |
| 5160989 | Extended body contact for semiconductor over insulator transistor | — | 1992-11-03 |
| 5157335 | On-chip error detection circuit | — | 1992-10-20 |
| 5150309 | Comprehensive logic circuit layout system | Ching-Hao Shaw, Patrick W. Bosshart, Douglas Matzke, Vibhu Kalyan | 1992-09-22 |
| 5119313 | Comprehensive logic circuit layout system | Ching-Hao Shaw, Patrick W. Bosshart, Douglas Matzke, Vibhu Kalyan | 1992-06-02 |
| 5107139 | On-chip transient event detector | Hsindao Lu, Terence G. W. Blake | 1992-04-21 |
| 5084873 | Chip error detector | — | 1992-01-28 |
| 5079604 | SOI layout for low resistance gate | Terence G. W. Blake | 1992-01-07 |
| 5053848 | Apparatus for providing single event upset resistance for semiconductor devices | Ping Yang | 1991-10-01 |
| 5046044 | SEU hardened memory cell | Terence G. W. Blake | 1991-09-03 |