Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8053322 | Epitaxial deposition-based processes for reducing gate dielectric thinning at trench edges and integrated circuits therefrom | Vladimir F. Drobny, Amitava Chatterjee, Rick L. Wise | 2011-11-08 |
| 6838348 | Integrated process for high voltage and high performance silicon-on-insulator bipolar devices | Jeffrey A. Babcock, Gregory E. Howard, Angelo Pinto, Scott Balster | 2005-01-04 |
| 6770952 | Integrated process for high voltage and high performance silicon-on-insulator bipolar devices | Jeffrey A. Babcock, Gregory E. Howard, Angelo Pinto, Scott Balster | 2004-08-03 |
| 6660616 | P-i-n transit time silicon-on-insulator device | Jeffrey A. Babcock, Gregory E. Howard, Angelo Pinto | 2003-12-09 |