Issued Patents All Time
Showing 126–150 of 160 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6009037 | Dynamic logic memory addressing circuits, systems, and methods with reduced capacitively loaded predecoders | — | 1999-12-28 |
| 5982702 | Dynamic logic memory addressing circuits, systems, and methods with predecoders providing data and precharge control to decoders | — | 1999-11-09 |
| 5954812 | Apparatus for caching system management memory in a computer having a system management mode employing address translation | Jonathan H. Shiell | 1999-09-21 |
| 5943258 | Memory with storage cells having SOI drive and access transistors with tied floating body connections | Theodore W. Houston | 1999-08-24 |
| 5905680 | Self-timed comparison circuits and systems | — | 1999-05-18 |
| 5896305 | Shifter circuit for an arithmetic logic unit in a microprocessor | Quang Dieu An | 1999-04-20 |
| 5831451 | Dynamic logic circuits using transistors having differing threshold voltages | — | 1998-11-03 |
| 5821778 | Using cascode transistors having low threshold voltages | — | 1998-10-13 |
| 5815697 | Circuits, systems, and methods for reducing microprogram memory power for multiway branching | Jonathan H. Shiell | 1998-09-29 |
| 5815005 | Power reduction circuits and systems for dynamic logic gates | — | 1998-09-29 |
| 5796995 | Circuit and method for translating signals between clock domains in a microprocessor | Mitra Nasserbakht | 1998-08-18 |
| 5732236 | Circuit and method for controlling access to paged DRAM banks with request prioritization and improved precharge schedule | Van Minh Nguyen | 1998-03-24 |
| 5629859 | Method for timing-directed circuit optimizations | Sanjive Agarwala | 1997-05-13 |
| 5604894 | Memory management system for checkpointed logic simulator with increased locality of data | Daniel C. Pickens | 1997-02-18 |
| 5604889 | Memory management system for checkpointed logic simulator with increased locality of data | Daniel C. Pickens | 1997-02-18 |
| 5600583 | Circuit and method for detecting if a sum of two multidigit numbers equals a third multidigit number prior to availability of the sum | Sanjive Agarwala | 1997-02-04 |
| 5588127 | High speed microprocessor branch decision circuit | — | 1996-12-24 |
| 5508950 | Circuit and method for detecting if a sum of two multibit numbers equals a third multibit constant number prior to availability of the sum | Sanjive Agarwala | 1996-04-16 |
| 5504867 | High speed microprocessor branch decision circuit | — | 1996-04-02 |
| 5461577 | Comprehensive logic circuit layout system | Ching-Hao Shaw, Douglas Matzke, Vibhu Kalyan, Theodore W. Houston | 1995-10-24 |
| 5455929 | Logic simulator employing hierarchical checkpointing | Daniel C. Pickens | 1995-10-03 |
| 5442325 | Voltage-controlled oscillator and system with reduced sensitivity to power supply variation | — | 1995-08-15 |
| 5440717 | Computer pipeline including dual-ported, content-addressable writebuffer | — | 1995-08-08 |
| 5386527 | Method and system for high-speed virtual-to-physical address translation and cache tag matching | — | 1995-01-31 |
| 5270955 | Method of detecting arithmetic or logical computation result | Sanjive Agarwala | 1993-12-14 |