Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8775740 | System and method for high performance, power efficient store buffer forwarding | — | 2014-07-08 |
| 7900020 | Correction of incorrect cache accesses | Barry Duane Williamson, Gerard R. Williams, III | 2011-03-01 |
| 7330936 | System and method for power efficient memory caching | Thang M. Tran, Rajinder Singh | 2008-02-12 |
| 7330964 | Microprocessor with independent SIMD loop buffer | Thang M. Tran | 2008-02-12 |
| 7237065 | Configurable cache system depending on instruction type | Thang M. Tran, Raul A. Garibay, Jr., Paul K. Miller | 2007-06-26 |
| 6249862 | Dependency table for reducing dependency checking hardware | Thang M. Tran, Wade A. Walker | 2001-06-19 |
| 6209084 | Dependency table for reducing dependency checking hardware | Thang M. Tran, Wade A. Walker | 2001-03-27 |
| 6108769 | Dependency table for reducing dependency checking hardware | Thang M. Tran, Wade A. Walker | 2000-08-22 |
| 5802588 | Load/store unit implementing non-blocking loads for a superscalar microprocessor and method of selecting loads in a non-blocking fashion from a load/store buffer | H. S. Ramagopal, Rajiv M. Hattangadi | 1998-09-01 |