Issued Patents All Time
Showing 151–167 of 167 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5264385 | SRAM design with no moat-to-moat spacing | — | 1993-11-23 |
| 5231296 | Thin film transistor structure with insulating mask | — | 1993-07-27 |
| 5223736 | Trench isolation process with reduced topography | — | 1993-06-29 |
| 5217924 | Method for forming shallow junctions with a low resistivity silicide layer | Robert H. Havemann | 1993-06-08 |
| 5213990 | Method for forming a stacked semiconductor structure | — | 1993-05-25 |
| 5198378 | Process of fabricating elevated source/drain transistor | Richard A. Chapman | 1993-03-30 |
| 5192706 | Method for semiconductor isolation | — | 1993-03-09 |
| 5145799 | Stacked capacitor SRAM cell | — | 1992-09-08 |
| 5108935 | Reduction of hot carrier effects in semiconductor devices by controlled scattering via the intentional introduction of impurities | — | 1992-04-28 |
| 5106777 | Trench isolation process with reduced topography | — | 1992-04-21 |
| 5100816 | Method of forming a field effect transistor on the surface of a substrate | — | 1992-03-31 |
| 5087581 | Method of forming vertical FET device with low gate to source overlap capacitance | — | 1992-02-11 |
| 5079180 | Method of fabricating a raised source/drain transistor | Richard A. Chapman | 1992-01-07 |
| 5073519 | Method of fabricating a vertical FET device with low gate to drain overlap capacitance | — | 1991-12-17 |
| 4999690 | Transistor | — | 1991-03-12 |
| 4998150 | Raised source/drain transistor | Richard A. Chapman | 1991-03-05 |
| 4877755 | Method of forming silicides having different thicknesses | — | 1989-10-31 |