Issued Patents All Time
Showing 351–375 of 865 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8977919 | Scan, test, and control circuits coupled to IC surfaces contacts | — | 2015-03-10 |
| 8977918 | IC with connections between linking module and test access ports | Baher Haroun | 2015-03-10 |
| 8972810 | I/O circuitry free of test clock coupled with destination/source circuitry | — | 2015-03-03 |
| 8972809 | Test messaging and control circuitry coupled to power pad | — | 2015-03-03 |
| 8964918 | IC first, second communication circuits each with three communication states | — | 2015-02-24 |
| 8959396 | Commandable data register control router connected to TCK and TDI | — | 2015-02-17 |
| 8943376 | Position independent testing of circuits | — | 2015-01-27 |
| 8941400 | Parallel scan paths with three bond pads, distributors and collectors | — | 2015-01-27 |
| 8941109 | Test output buffer functional output input, test output, enable input | Richard L. Antley | 2015-01-27 |
| 8938652 | Addressable tap domain selection circuit with AUXI/O, TDI/TDO, TMS/TRCK leads | — | 2015-01-20 |
| 8935585 | Tap controller having TMS, TCK, enable inputs and control outputs | — | 2015-01-13 |
| 8924802 | IC TAP with dual port router and additional capture input | — | 2014-12-30 |
| 8924804 | Synchronizer and buffers delaying strobe to individual parallel scan paths | — | 2014-12-30 |
| 8918687 | IC clock doubler output gated to multiplexer and output buffer | — | 2014-12-23 |
| 8918688 | Gating WSP capture and TAP ShiftDR with TAP IR enable | — | 2014-12-23 |
| 8910003 | Controller circuitry with state machines, address store/compare, and shift register | — | 2014-12-09 |
| 8898528 | DDR JTAG interface setting flip-flops in high state at power-up | — | 2014-11-25 |
| 8892970 | Address and instruction controller with TCK, TMS, address match inputs | — | 2014-11-18 |
| 8880966 | Transitioning POLL IN to set MRST and CE high states | — | 2014-11-04 |
| 8880967 | Semiconductor test system and method | — | 2014-11-04 |
| 8880968 | Interposer having functional leads, TAP, trigger unit, and monitor circuitry | — | 2014-11-04 |
| 8872178 | IC with comparator receiving expected and mask data from pads | Alan Hales | 2014-10-28 |
| 8850279 | IC test linking module with augmentation instruction shift register | Baher Haroun | 2014-09-30 |
| 8839060 | JTAG shadow protocol circuit with detection, command and address circuits | — | 2014-09-16 |
| 8839059 | Core circuit test architecture | — | 2014-09-16 |