Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11676993 | Method and structure for dual sheet resistance trimmable thin film resistors | Christoph Dirnecker, Wolfgang Schwartz, Joel M. Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger | 2023-06-13 |
| 11257907 | High voltage demos transistor with improved threshold voltage matching | — | 2022-02-22 |
| 10770538 | Method and structure for dual sheet resistance trimmable thin film resistors | Christoph Dirnecker, Wolfgang Schwartz, Joel M. Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger | 2020-09-08 |
| 10629683 | High voltage DEMOS transistor with improved threshold voltage matching | — | 2020-04-21 |
| 10522663 | Integrated JFET structure with implanted backgate | Alexei Sadovnikov, Mattias E. Dahlstrom, Joel M. Halbert | 2019-12-31 |
| 10497630 | High density wafer level test module | — | 2019-12-03 |
| 10374100 | Programmable non-volatile memory with low off current | Jack Qian | 2019-08-06 |
| 10103278 | Silicon IMPATT diode | Xiaochuan Bi, Tracey L. Krakowski | 2018-10-16 |
| 10079294 | Integrated JFET structure with implanted backgate | Alexei Sadovnikov, Mattias E. Dahlstrom, Joel M. Halbert | 2018-09-18 |
| 9991329 | Method and structure for dual sheet resistance trimmable thin film resistors at same level | Christoph Dirnecker, Wolfgang Schwartz, Joel M. Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger | 2018-06-05 |
| 9412879 | Integration of the silicon IMPATT diode in an analog technology | Xiaochuan Bi, Tracey L. Krakowski | 2016-08-09 |
| 8436635 | Semiconductor wafer having test modules including pin matrix selectable test devices | Martin B. Mollat, Fan-Chi Hou | 2013-05-07 |
| 7039888 | Modeling process for integrated circuit film resistors | Philipp Steinmann, Amitava Chatterjee, Roland Bucksch | 2006-05-02 |