Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8436635 | Semiconductor wafer having test modules including pin matrix selectable test devices | Martin B. Mollat, Doug Weiser | 2013-05-07 |
| 7745274 | Gate self aligned low noise JFET | Xiaoju Wu, Pinghai Hao | 2010-06-29 |
| 7268394 | JFET structure for integrated circuit and fabrication method | Pinghai Hao, Imran Khan | 2007-09-11 |
| 7018880 | Method for manufacturing a MOS transistor having reduced 1/f noise | Pinghai Hao, Larry B. Anderson, Xiaoju Wu, Yvonne Patton, Shanjen Pan +1 more | 2006-03-28 |
| 6861303 | JFET structure for integrated circuit and fabrication method | Pinghai Hao, Imran Khan | 2005-03-01 |