Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6539467 | Microprocessor with non-aligned memory access | Timothy David Anderson, David Hoyle, Steven D. Krueger | 2003-03-25 |
| 6442667 | Selectively powering X Y organized memory banks | Jonathan H. Shiell | 2002-08-27 |
| 6405351 | System for verifying leaf-cell circuit properties | Anthony M. Hill, Richard P. Wiley | 2002-06-11 |
| 6385120 | Power-off state storage apparatus and method | — | 2002-05-07 |
| 6266754 | Secure computing device including operating system stored in non-relocatable page of memory | Frank L. Laczko, Sr. | 2001-07-24 |
| 6148395 | Shared floating-point unit in a single chip multiprocessor | Tuan Dao | 2000-11-14 |
| 6065113 | Circuits, systems, and methods for uniquely identifying a microprocessor at the instruction set level employing one-time programmable register | Jonathan H. Shiell, Joel J. Graber | 2000-05-16 |
| 6061811 | Circuits, systems, and methods for external evaluation of microprocessor built-in self-test | James O. Bondi, Joel J. Graber, John M. Johnsen | 2000-05-09 |
| 6009516 | Pipelined microprocessor with efficient self-modifying code detection and handling | Timothy David Anderson, Sanjive Agarwala | 1999-12-28 |
| 5961632 | Microprocessor with circuits, systems, and methods for selecting alternative pipeline instruction paths based on instruction leading codes | Jonathan H. Shiell | 1999-10-05 |
| 5913049 | Multi-stream complex instruction set microprocessor | Jonathan H. Shiell | 1999-06-15 |
| 5903742 | Method and circuit for redefining bits in a control register | Jonathan H. Shiell | 1999-05-11 |
| 5850543 | Microprocessor with speculative instruction pipelining storing a speculative register value within branch target buffer for use in speculatively executing instructions after a return | Jonathan H. Shiell | 1998-12-15 |
| 5838908 | Device for having processors each having interface for transferring delivery units specifying direction and distance and operable to emulate plurality of field programmable gate arrays | Douglas Matzke | 1998-11-17 |
| 5815420 | Microprocessor arithmetic logic unit using multiple number representations | — | 1998-09-29 |
| 5047973 | High speed numerical processor for performing a plurality of numeric functions | Maria B. Hipona, Henry M. Darley | 1991-09-10 |