Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12027229 | High speed differential rom | Suresh Balasubramanian | 2024-07-02 |
| 11558046 | Resistor-capacitor (RC) delay circuit with a precharge mode | — | 2023-01-17 |
| 11495301 | Sense amplifier look-through latch for FAMOS-based EPROM | Xiaowei Deng, Yunchen Qiu | 2022-11-08 |
| 10854265 | Time tracking circuit for FRAM | — | 2020-12-01 |
| 10283181 | Time tracking circuit for FRAM | — | 2019-05-07 |
| 10192629 | Self-latch sense timing in a one-time-programmable memory architecture | Yunchen Qiu, Harold L. Davis | 2019-01-29 |
| 10050612 | Resistor-capacitor (RC) delay circuit with a precharge mode | — | 2018-08-14 |
| 9881687 | Self-latch sense timing in a one-time-programmable memory architecture | Yunchen Qiu, Harold L. Davis | 2018-01-30 |
| 8756558 | FRAM compiler and layout | Michael Patrick Clinton | 2014-06-17 |
| 8423837 | High reliability and low power redundancy for memory | Sudhir K. Madan, Robert J. Landers | 2013-04-16 |
| 8381075 | Low-power redundancy for non-volatile memory | Sudhir K. Madan, Suresh Balasubramanian | 2013-02-19 |
| 7145822 | Method and apparatus for optimal write restore for memory | — | 2006-12-05 |
| 6735146 | System and method for pulling electrically isolated memory cells in a memory array to a non-floating state | Robert L. Pitts | 2004-05-11 |
| 6731564 | Method and system for power conservation in memory devices | Tam Minh Dai Tran, George B. Jamison, Bryan Sheffield, Vikas Agrawal | 2004-05-04 |
| 5508964 | Write recovery time minimization for Bi-CMOS SRAM | — | 1996-04-16 |