Issued Patents All Time
Showing 26–50 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11268070 | Methods for creating integration-free, virus-free, exogenous oncogene-free IPS cells and compositions for use in such methods | Alan B. MOY | 2022-03-08 |
| 11255901 | Wire break detection in digital input receivers | — | 2022-02-22 |
| 11239839 | Gate driver with VGTH and VCESAT measurement capability for the state of health monitor | Xiong Li | 2022-02-01 |
| 11119971 | I2C standard compliant bidirectional buffer | Tarunvir Singh | 2021-09-14 |
| 11107883 | Device isolator with reduced parasitic capacitance | Raja Selvaraj, Byron Lovell Williams, Thomas D. Bonifield, John Kenneth Arch | 2021-08-31 |
| 11012034 | Digital isolator | Sreeram Nasum S | 2021-05-18 |
| 10903746 | Load dependent in-rush current control with fault detection across Iso-barrier | Keith E. Kunz, Maurizio Granato, Prajkta Vyavahare | 2021-01-26 |
| 10771052 | Gate driver with VGTH and VCESAT measurement capability for the state of health monitor | Xiong Li | 2020-09-08 |
| 10712426 | Fault tolerant digital input receiver circuit | Kevin Paul Herring | 2020-07-14 |
| 10557884 | Wire break detection in digital input receivers | — | 2020-02-11 |
| 10363861 | Timing correction in a communication system | Divyasree J. | 2019-07-30 |
| 10291225 | Gate driver with VGTH and VCESAT measurement capability for the state of health monitor | Xiong Li | 2019-05-14 |
| 10281946 | Input current limit in digital input receivers | Shailendra Kumar Baranwal | 2019-05-07 |
| 10186576 | Device isolator with reduced parasitic capacitance | Raja Selvaraj, Byron Lovell Williams, Thomas D. Bonifield, John Kenneth Arch | 2019-01-22 |
| 10122524 | Timing correction in a communication system | Divyasree J. | 2018-11-06 |
| 10038403 | Digital isolator | Sreeram Nasum S | 2018-07-31 |
| 10014760 | Soft-start switch circuit | Shailendra Kumar Baranwal, Alan S. Bass, VIGHNESH RUDRA DAS, ABHIJEETH AAREY PREMANATH | 2018-07-03 |
| 9935763 | Timing correction in a communication system | Divyasree J. | 2018-04-03 |
| 9806148 | Device isolator with reduced parasitic capacitance | Raja Selvaraj, Byron Lovell Williams, Thomas D. Bonifield, John Kenneth Arch | 2017-10-31 |
| 9698728 | Digital isolator | Sreeram Nasum S | 2017-07-04 |
| 9455721 | FLL oscillator/clock with an FLL control loop including a switched capacitor resistive divider | Divyasree J. | 2016-09-27 |
| 8842780 | Method and apparatus for correcting signal dependent duty cycle errors in amplitude shift keying receivers | Sriram Ramadoss, Shrinivasan Jaganathan | 2014-09-23 |
| 8456210 | Delay locked loop with offset correction | SundaraSiva Rao Giduturi | 2013-06-04 |
| 8446198 | Phase interpolator and a delay circuit for the phase interpolator | Krishnaswamy Nagaraj, Sudheer K. Vemulapalli, Jayawardan Janardhanan, Karthik Subburaj, Sujoy Chakravarty +1 more | 2013-05-21 |
| 8411804 | Digital demodulation of pulse-width modulated signals | Karthik Subburaj, Jayawardan Janardhanan | 2013-04-02 |