Issued Patents All Time
Showing 76–100 of 227 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8742463 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with outer positioned gate contacts | Jim Mali, Carole Lambert | 2014-06-03 |
| 8742462 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate contact position specifications | Jim Mali, Carole Lambert | 2014-06-03 |
| 8735995 | Cross-coupled transistor circuit defined on three gate electrode tracks with diffusion regions of common node on opposing sides of same gate electrode track | Jim Mali, Carole Lambert | 2014-05-27 |
| 8735944 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with serially connected transistors | Jim Mali, Carole Lambert | 2014-05-27 |
| 8729606 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels | Jim Mali, Carole Lambert | 2014-05-20 |
| 8729643 | Cross-coupled transistor circuit including offset inner gate contacts | Jim Mali, Carole Lambert | 2014-05-20 |
| 8701071 | Enforcement of semiconductor structure regularity for localized transistors and interconnect | Stephen Kornachuk, Jim Mali, Carole Lambert | 2014-04-15 |
| 8680626 | Methods, structures, and designs for self-aligning local interconnects used in integrated circuits | Michael C. Smayling | 2014-03-25 |
| 8680583 | Integrated circuit including cross-coupled transistors having gate electrodes formed within at least nine gate level feature layout channels | Jim Mali, Carole Lambert | 2014-03-25 |
| 8669595 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate contact position, alignment, and offset specifications | Jim Mali, Carole Lambert | 2014-03-11 |
| 8669594 | Integrated circuit including cross-coupled transistors having gate electrodes formed within at least twelve gate level feature layout channels | Jim Mali, Carole Lambert | 2014-03-11 |
| 8667443 | Integrated circuit cell library for multiple patterning | Michael C. Smayling | 2014-03-04 |
| 8661392 | Methods for cell boundary encroachment and layouts implementing the Same | Jonathan R. Quandt, Dhrumil Gandhi | 2014-02-25 |
| 8658542 | Coarse grid design methods and structures | Michael C. Smayling | 2014-02-25 |
| 8653857 | Circuitry and layouts for XOR and XNOR logic | — | 2014-02-18 |
| 8592872 | Integrated circuit including cross-coupled transistors with two transistors of different type having gate electrodes formed by common gate level feature with shared diffusion regions on opposite sides of common gate level feature | Jim Mali, Carole Lambert | 2013-11-26 |
| 8587034 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts and electrical connection of transistor gates through linear interconnect conductors in single interconnect layer | Jim Mali, Carole Lambert | 2013-11-19 |
| 8581304 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts having offset and aligned relationships | Jim Mali, Carole Lambert | 2013-11-12 |
| 8581303 | Integrated circuit including cross-coupled trasistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts having offset relationships and electrical connection of cross-coupled transistors through same interconnect layer | Jim Mali, Carole Lambert | 2013-11-12 |
| 8575706 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least two different gate level features inner extensions beyond gate electrode | Jim Mali, Carole Lambert | 2013-11-05 |
| 8569841 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least one gate level feature extending into adjacent gate level feature layout channel | Jim Mali, Carole Lambert | 2013-10-29 |
| 8564071 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least two different gate level feature extensions beyond contact | Jim Mali, Carole Lambert | 2013-10-22 |
| 8558322 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least two gate electrodes electrically connected to each other through gate level feature | Jim Mali, Carole Lambert | 2013-10-15 |
| 8552509 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with other transistors positioned between cross-coupled transistors | Jim Mali, Carole Lambert | 2013-10-08 |
| 8552508 | Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with shared diffusion regions on opposite sides of two-transistor-forming gate level feature and electrical connection of transistor gates through linear interconnect conductors in single interconnect layer | Jim Mali, Carole Lambert | 2013-10-08 |