Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9754878 | Semiconductor chip including a chip level based on a layout that includes both regular and irregular wires | James Mali, Carole Lambert, Scott T. Becker, Brian Reed | 2017-09-05 |
| 9530734 | Enforcement of semiconductor structure regularity for localized transistors and interconnect | Jim Mali, Carole Lambert, Scott T. Becker | 2016-12-27 |
| 9202779 | Enforcement of semiconductor structure regularity for localized transistors and interconnect | Jim Mali, Carole Lambert, Scott T. Becker | 2015-12-01 |
| 8701071 | Enforcement of semiconductor structure regularity for localized transistors and interconnect | Jim Mali, Carole Lambert, Scott T. Becker | 2014-04-15 |
| 8453094 | Enforcement of semiconductor structure regularity for localized transistors and interconnect | Jim Mali, Carole Lambert, Scott T. Becker | 2013-05-28 |
| 8448102 | Optimizing layout of irregular structures in regular layout context | Carole Lambert, James Mali, Brian Reed, Scott T. Becker | 2013-05-21 |
| 8225261 | Methods for defining contact grid in dynamic array architecture | Joseph Hong, Scott T. Becker | 2012-07-17 |
| 7586800 | Memory timing apparatus and associated methods | — | 2009-09-08 |
| 7577049 | Speculative sense enable tuning apparatus and associated methods | — | 2009-08-18 |