Issued Patents All Time
Showing 101–125 of 193 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11515211 | Cut EPI process and structures | Feng-Ching Chu, Chia-Pin Lin | 2022-11-29 |
| 11508736 | Method for forming different types of devices | Feng-Ching Chu, Feng-Cheng Yang, Yen-Ming Chen | 2022-11-22 |
| 11508827 | Air spacer for a gate structure of a transistor | Yi-Hsiu Liu, Feng-Cheng Yang, Tsung-Lin Lee, Yen-Ming Chen, Yen-Ting Chen | 2022-11-22 |
| 11502005 | Semiconductor devices and methods of forming the same | Feng-Ching Chu, Feng-Cheng Yang, Yen-Ming Chen | 2022-11-15 |
| 11502182 | Selective gate air spacer formation | Chih-Hsin Yang, Yen-Ming Chen, Feng-Cheng Yang, Tsung-Lin Lee, Dian-Hau Chen | 2022-11-15 |
| 11495606 | FinFET having non-merging epitaxially grown source/drains | Chun Po Chang, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Tzu-Hsiang Hsu | 2022-11-08 |
| 11488874 | Semiconductor device with funnel shape spacer and methods of forming the same | Cheng-Yu Yang, Yen-Ting Chen, Fu-Kai Yang, Yen-Ming Chen | 2022-11-01 |
| 11456295 | Air gap formation between gate spacer and epitaxy structure | Bo-Yu Lai, Kai-Hsuan Lee, Feng-Cheng Yang, Yen-Ming Chen | 2022-09-27 |
| 11450559 | Integrated circuit structure with backside dielectric layer having air gap | Che-Lun Chang, Chia-Pin Lin, Yuan-Ching Peng | 2022-09-20 |
| 11444162 | Backside contact with air spacer | Chen-Ming Lee | 2022-09-13 |
| 11444178 | Inner spacer liner | Jin-Mu Yin, Chih-Hao Yu, Yen-Ting Chen, Chia-Pin Lin | 2022-09-13 |
| 11417767 | Semiconductor devices including backside vias and methods of forming the same | Che-Lun Chang, Chia-Pin Lin, Yuan-Ching Peng | 2022-08-16 |
| 11398553 | Source/drain features | Ruei-Ping Lin, Kai-Di Tzeng, Chen-Ming Lee | 2022-07-26 |
| 11387322 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | Chih-Ching Wang, Ming-Chang Wen, Jo-Tzu HUNG, Wen-Hsing Hsieh, Kuan-Lun Cheng | 2022-07-12 |
| 11374128 | Method and structure for air gap inner spacer in gate-all-around devices | Shih-Chiang Chen, Chia-Pin Lin, Yuan-Ching Peng | 2022-06-28 |
| 11362199 | Semiconductor device and method | I-Hsieh Wong, Yen-Ting Chen, Feng-Cheng Yang, Yen-Ming Chen | 2022-06-14 |
| 11355400 | Using a metal-containing layer as an etching stop layer and to pattern source/drain regions of a FinFET | Yen-Ting Chen, Feng-Cheng Yang, Yen-Ming Chen | 2022-06-07 |
| 11328960 | Semiconductor structure with gate-all-around devices and stacked FinFET devices | Feng-Ching Chu, Chia-Pin Lin | 2022-05-10 |
| 11296077 | Transistors with recessed silicon cap and method forming same | Yen-Ting Chen, Bo-Yu Lai, Chien-Wei Lee, Hsueh-Chang Sung, Feng-Cheng Yang +1 more | 2022-04-05 |
| 11289574 | Methods of forming epitaxial source/drain features in semiconductor devices | Tzu-Hsiang Hsu, Ting-Yeh Chen, Feng-Cheng Yang, Yen-Ming Chen | 2022-03-29 |
| 11257928 | Method for epitaxial growth and device | Tzu-Hsiang Hsu, Ting-Yeh Chen, Feng-Cheng Yang, Yen-Ming Chen | 2022-02-22 |
| 11217490 | Source/drain features with an etch stop layer | Feng-Ching Chu, Feng-Cheng Yang, Yen-Ming Chen | 2022-01-04 |
| 11217486 | Semiconductor device and method | Cheng-Yu Yang, Feng-Cheng Yang, Yen-Ming Chen, Yen-Ting Chen | 2022-01-04 |
| 11211455 | Formation of dislocations in source and drain regions of FinFET devices | Chun Hsiung Tsai, Wei-Yuan Lu, Chien-Tai Chan, Da-Wen Lin | 2021-12-28 |
| 11205597 | Semiconductor device and method | Wei-Chun Tan, I-Hsieh Wong, Te-En Cheng, Yung-Hui Lin, Wei-Ken Lin +1 more | 2021-12-21 |