Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879238 | Negative capacitance finFET and method of fabricating thereof | Kuo-Cheng Ching, Kuan-Lun Cheng, Chih-Hao Wang, Sai-Hooi Yeong, Chi-Hsing Hsu | 2020-12-29 |
| 10861972 | Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage | Zhiqiang Wu, Yi-Ming Sheu, Chun-Fu Cheng, Hong-Shen Chen | 2020-12-08 |
| RE48304 | Source and drain dislocation fabrication in FinFETs | Zhiqiang Wu, Wen-Hsing Hsieh, Hua Feng Chen, Ting-Yun Wu, Carlos H. Diaz +1 more | 2020-11-10 |
| 10535680 | Integrated circuit structure and method with hybrid orientation for FinFET | Zhiqiang Wu, Chung-Cheng Wu, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang +1 more | 2020-01-14 |
| 10276717 | Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage | Zhiqiang Wu, Yi-Ming Sheu, Chun-Fu Cheng, Hong-Shen Chen | 2019-04-30 |
| 9653545 | MOSFET structure with T-shaped epitaxial silicon channel | Mahaveer Sathaiya Dhanyakumar, Wei-Hao Wu, Tsung-Hsing Yu, Chia-Wen Liu, Ken-Ichi Goto +1 more | 2017-05-16 |
| 9455346 | Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage | Zhiqiang Wu, Yi-Ming Sheu, Chun-Fu Cheng, Hong-Shen Chen | 2016-09-27 |
| 9263345 | SOI transistors with improved source/drain structures with enhanced strain | Ken-Ichi Goto, Dhanyakumar Mahaveer Sathaiya, Ching-Chang Wu | 2016-02-16 |
| 9230828 | Source and drain dislocation fabrication in FinFETs | Zhiqiang Wu, Wen-Hsing Hsieh, Hua Feng Chen, Ting-Yun Wu, Carlos H. Diaz +1 more | 2016-01-05 |
| 9000526 | MOSFET structure with T-shaped epitaxial silicon channel | Mahaveer Sathaiya Dhanyakumar, Wei-Hao Wu, Tsung-Hsing Yu, Chia-Wen Liu, Ken-Ichi Goto +1 more | 2015-04-07 |
| 8993424 | Method for forming a semiconductor transistor device with optimized dopant profile | Chia-Wen Liu, Tsung-Hsing Yu, Dhanyakumar Mahaveer Sathaiya, Wei-Hao Wu, Ken-Ichi Goto +1 more | 2015-03-31 |
| 8866235 | Source and drain dislocation fabrication in FinFETs | Zhiqiang Wu, Wen-Hsing Hsieh, Hua Feng Chen, Ting-Yun Wu, Carlos H. Diaz +1 more | 2014-10-21 |
| 7749833 | Semiconductor MOS transistor device and method for making the same | Shyh-Fann Ting, Cheng-Tung Huang, Wen-Han Hung, Tzyy-Ming Cheng, Yi-Chung Sheng | 2010-07-06 |
| 7618856 | Method for fabricating strained-silicon CMOS transistors | Shyh-Fann Ting, Cheng-Tung Huang, Jing-Chang Wu, Kun-Hsien Lee, Wen-Han Hung +3 more | 2009-11-17 |
| 7550356 | Method of fabricating strained-silicon transistors | Cheng-Tung Huang, Chia-Wen Liang, Tzyy-Ming Cheng, Yi-Chung Sheng | 2009-06-23 |
| 7508053 | Semiconductor MOS transistor device and method for making the same | Shyh-Fann Ting, Cheng-Tung Huang, Wen-Han Hung, Tzyy-Ming Cheng, Yi-Chung Sheng | 2009-03-24 |
| 7342284 | Semiconductor MOS transistor device and method for making the same | Shyh-Fann Ting, Cheng-Tung Huang, Wen-Han Hung, Tzyy-Ming Cheng, Yi-Chung Sheng | 2008-03-11 |