Issued Patents All Time
Showing 51–75 of 78 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8068576 | Counters and exemplary applications | Chih-Chang Lin, Steven Swei | 2011-11-29 |
| 8004354 | Automatic level control | Chiang Pu, Ming-Chich Huang, Chan-Hong Chern | 2011-08-23 |
| 7961050 | Integrated circuits including an equalizer and operating methods thereof | Yuwen Swei, Chih-Chang Lin, Chan-Hong Chern, Ming-Chieh Huang | 2011-06-14 |
| 7948820 | Circuit pre-charge to sense a memory line | Yonggang Wu, Nian Yang | 2011-05-24 |
| 7746706 | Methods and systems for memory devices | Nian Yang, Yonggang Wu | 2010-06-29 |
| 7724075 | Method to provide a higher reference voltage at a lower power supply in flash memory devices | Yonggang Wu, Nian Yang | 2010-05-25 |
| 7505298 | Transfer of non-associated information on flash memory devices | Nian Yang, Yonggang Wu | 2009-03-17 |
| 7460415 | Drain voltage regulator | Yonggang Wu, Nian Yang | 2008-12-02 |
| 7142454 | System and method for Y-decoding in a flash memory device | Ming-Huei Shieh, Kurihara Kazuhiro, Pau-Ling Chen | 2006-11-28 |
| 7026843 | Flexible cascode amplifier circuit with high gain for flash memory cells | Pau-Ling Chen | 2006-04-11 |
| 6944057 | Method to obtain temperature independent program threshold voltage distribution using temperature dependent voltage reference | Edward Franklin Runnion, Binh Quang Le, Shigekazu Yamada, Darlene Hamilton, Ming-Huei Shieh +2 more | 2005-09-13 |
| 6884638 | METHOD OF FABRICATING A FLASH MEMORY SEMICONDUCTOR DEVICE BY DETERMINING THE ACTIVE REGION WIDTH BETWEEN SHALLOW TRENCH ISOLATION STRUCTURES USING AN OVERDRIVE CURRENT MEASUREMENT TECHNIQUE AND A DEVICE THEREBY FABRICATED | Nian Yang, Zhigang Wang | 2005-04-26 |
| 6859748 | Test structure for measuring effect of trench isolation on oxide in a memory device | Nian Yang, Zhigang Wang | 2005-02-22 |
| 6859393 | Ground structure for page read and page write for flash memory | Shigekazu Yamada, Ming-Huei Shieh, Pau-Ling Chen | 2005-02-22 |
| 6856160 | Maximum VCC calculation method for hot carrier qualification | Hyeon-Seag Kim, Amit P. Marathe, Nian Yang | 2005-02-15 |
| 6825083 | Method for reducing shallow trench isolation edge thinning on thin gate oxides to improve peripheral transistor reliability and performance for high performance flash memory devices | Nian Yang, John Jianshi Wang, Xin Guo | 2004-11-30 |
| 6825684 | Hot carrier oxide qualification method | Hyeon-Seag Kim, Amit P. Marathe, Nian Yang | 2004-11-30 |
| 6818462 | METHOD OF DETERMINING THE ACTIVE REGION WIDTH BETWEEN SHALLOW TRENCH ISOLATION STRUCTURES USING A C-V MEASUREMENT TECHNIQUE FOR FABRICATING A FLASH MEMORY SEMICONDUCTOR DEVICE AND A DEVICE THEREBY FORMED | Nian Yang, Zhigang Wang | 2004-11-16 |
| 6784682 | Method of detecting shallow trench isolation corner thinning by electrical trapping | Nian Yang, Hyeon-Seag Kim | 2004-08-31 |
| 6759295 | METHOD OF DETERMINING THE ACTIVE REGION WIDTH BETWEEN SHALLOW TRENCH ISOLATION STRUCTURES USING A GATE CURRENT MEASUREMENT TECHNIQUE FOR FABRICATING A FLASH MEMORY SEMICONDUCTOR DEVICE AND DEVICE THEREBY FORMED | Nian Yang, Zhigang Wang | 2004-07-06 |
| 6756806 | Method of determining location of gate oxide breakdown of MOSFET by measuring currents | Nian Yang, Zhigang Wang | 2004-06-29 |
| 6734028 | Method of detecting shallow trench isolation corner thinning by electrical stress | Nian Yang, Hyeon-Seag Kim | 2004-05-11 |
| 6734080 | Semiconductor isolation material deposition system and method | Nian Yang, John Jianshi Wang | 2004-05-11 |
| 6731130 | Method of determining gate oxide thickness of an operational MOSFET | Nian Yang, Zhigang Wang | 2004-05-04 |
| 6728160 | Path gate driver circuit | Kurihara Kazuhiro, Pau-Ling Chen | 2004-04-27 |