Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12324199 | Fill structures with air gaps | Hsiu-Yung LIN, Yen Chuang | 2025-06-03 |
| 11961884 | Fill structures with air gaps | Hsiu-Yung LIN, Yen Chuang | 2024-04-16 |
| 11358252 | Method of using a polishing system | Shih-Chi Lin, Kun-Tai Wu, You-Hua Chou, Chih-Tsung Lee, Chih-Jen Wu +4 more | 2022-06-14 |
| 10861721 | Apparatus and method for processing wafer | You-Hua Chou, Kuan-Chung Chen | 2020-12-08 |
| 10357867 | Polishing system | Shih-Chi Lin, Kun-Tai Wu, You-Hua Chou, Chih-Tsung Lee, Chih-Jen Wu +4 more | 2019-07-23 |
| 10204807 | Apparatus and method for processing wafer | You-Hua Chou, Kuan-Chung Chen | 2019-02-12 |
| 9786707 | Image sensor isolation region and method of forming the same | Shiu-Ko JangJian, Kei-Wei Chen, Szu-An Wu | 2017-10-10 |
| 9718164 | Polishing system and polishing method | Shih-Chi Lin, Kun-Tai Wu, You-Hua Chou, Chih-Tsung Lee, Chih-Jen Wu +4 more | 2017-08-01 |
| 9673244 | Image sensor isolation region and method of forming the same | Shiu-Ko JangJian, Kei-Wei Chen, Szu-An Wu | 2017-06-06 |
| 9607946 | Reverse damascene process | You-Hua Chou, Jian-Shin Tsai, Miao-Cheng Liao, Hsiang Hsiang Ko | 2017-03-28 |
| 9536834 | Reverse damascene process | You-Hua Chou, Jian-Shin Tsai, Miao-Cheng Liao, Hsiang Hsiang Ko | 2017-01-03 |
| 9502280 | Two-step shallow trench isolation (STI) process | You-Hua Chou, Chih-Tsung Lee, Shiu-Ko JangJian, Miao-Cheng Liao, Hsiang Hsiang Ko +1 more | 2016-11-22 |
| 9478581 | Grids in backside illumination image sensor chips and methods for forming the same | Shiu-Ko JangJian, Ting-Chun Wang, Chung-Ren Sun | 2016-10-25 |
| 9368540 | CIS image sensors with epitaxy layers and methods for forming the same | Shiu-Ko JangJian, Kei-Wei Chen, Chi-Cherng Jeng | 2016-06-14 |
| 9349902 | System and method for reducing irregularities on the surface of a backside illuminated photodiode | Shiu-Ko JangJian, Kei-Wei Chen, Chi-Cherng Jeng | 2016-05-24 |
| 9257476 | Grids in backside illumination image sensor chips and methods for forming the same | Shiu-Ko JangJian, Ting-Chun Wang, Chung-Ren Sun | 2016-02-09 |
| 9214514 | Mechanisms for forming semiconductor device having stable dislocation profile | Shiu-Ko JangJian, Chih-Tsung Lee, Miao-Cheng Liao | 2015-12-15 |
| 9041140 | Grids in backside illumination image sensor chips and methods for forming the same | Shiu-Ko JangJian, Ting-Chun Wang, Chung-Ren Sun | 2015-05-26 |
| 9006070 | Two-step shallow trench isolation (STI) process | You-Hua Chou, Chih-Tsung Lee, Shiu-Ko JangJian, Miao-Cheng Liao, Hsiang Hsiang Ko +1 more | 2015-04-14 |
| 8889461 | CIS image sensors with epitaxy layers and methods for forming the same | Shiu-Ko JangJian, Kei-Wei Chen, Chih-Cherng Jeng | 2014-11-18 |
| 8796105 | Method and apparatus for preparing polysilazane on a semiconductor wafer | You-Hua Chou, Chih-Tsung Lee, Ming Huei Lien, Chih-Jen Wu, Chen-Ming Huang | 2014-08-05 |
| 8772899 | Method and apparatus for backside illumination sensor | Shiu-Ko JangJian, Kei-Wei Chen, Ying-Lang Wang | 2014-07-08 |
| 8692299 | Two-step shallow trench isolation (STI) process | You-Hua Chou, Chih-Tsung Lee, Shiu-Ko JangJian, Miao-Cheng Liao, Hsiang Hsiang Ko +1 more | 2014-04-08 |
| 8518818 | Reverse damascene process | You-Hua Chou, Jian-Shin Tsai, Miao-Cheng Liao, Hsiang Hsiang Ko | 2013-08-27 |
| 8455883 | Stressed semiconductor device and method of manufacturing | Miao-Cheng Liao, Hsiang Hsiang Ko, Kei-Wei Chen, Ying-Lang Wang | 2013-06-04 |