Issued Patents All Time
Showing 26–50 of 348 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12349379 | Semiconductor devices and methods of manufacture | Zhi-Chang Lin, Shih-Cheng Chen, Lo-Heng Chang, Jung-Hung Chang | 2025-07-01 |
| 12342616 | Semiconductor device structure and methods of forming the same | Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Chih-Hao Wang +1 more | 2025-06-24 |
| 12342604 | Fin isolation structures of semiconductor devices | Chih-Hao Wang, Kuan-Lun Cheng, Yen-Ming Chen | 2025-06-24 |
| 12342587 | Integrated circuit with nanostructure transistors and bottom dielectric insulators | Zhi-Chang Lin, Chien Ning Yao, Shih-Cheng Chen, Jung-Hung Chang, Tsung-Han CHUANG +1 more | 2025-06-24 |
| 12336240 | Transistor including dielectric barrier and manufacturing method thereof | Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Chien Ning Yao, Chih-Hao Wang | 2025-06-17 |
| 12336226 | Semiconductor device structure including stacked nanostructures | Jung-Hung Chang, Zhi-Chang Lin, Shih-Cheng Chen, Chien Ning Yao, Tsung-Han CHUANG +2 more | 2025-06-17 |
| 12324229 | Semiconductor device structure including forksheet transistors and methods of forming the same | Guan-Lin Chen, Shi Ning Ju, Jung-Chien Cheng, Chih-Hao Wang, Kuan-Lun Cheng | 2025-06-03 |
| 12324225 | Self-aligned structure for semiconductor devices | Chih-Hao Wang, Shi Ning Ju, Kuan-Lun Cheng, Kuan-Ting Pan | 2025-06-03 |
| 12324219 | Integrated circuit including dipole incorporation for threshold voltage tuning in transistors | Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2025-06-03 |
| 12324215 | Semiconductor device structure with metal gate stack | Jia-Chuan You, Huan-Chieh Su, Chih-Hao Wang | 2025-06-03 |
| 12322653 | Self-aligned metal gate for multigate device and method of forming thereof | Jia-Chuan You, Kuan-Ting Pan, Shi Ning Ju, Chia-Hao Wang | 2025-06-03 |
| 12317527 | Integrated circuit with a Fin and gate structure and method making the same | Teng-Chun Tsai, Kuan-Lun Cheng, Chih-Hao Wang | 2025-05-27 |
| 12315731 | Integrated circuit with nanosheet transistors with metal gate passivation | Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2025-05-27 |
| 12317542 | Semiconductor device with backside self-aligned power rail and methods of forming the same | Chih-Chao Chou, Shi Ning Ju, Wen-Ting Lan, Chih-Hao Wang | 2025-05-27 |
| 12317540 | Method for manufacturing semiconductor structure with isolation feature | Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Chien Ning Yao, Tsung-Han CHUANG | 2025-05-27 |
| 12317528 | Gate isolation feature and manufacturing method thereof | Kuan-Ting Pan, Huan-Chieh Su, Jia-Chuan You, Shi Ning Ju, Yi-Ruei Jhan +2 more | 2025-05-27 |
| 12300731 | Multigate device with air gap spacer and backside rail contact and method of fabricating thereof | Guan-Lin Chen, Shi Ning Ju, Chih-Hao Wang, Kuan-Lun Cheng | 2025-05-13 |
| 12302630 | Integrated circuit with backside trench for metal gate definition | Jung-Chien Cheng, Shi Ning Ju, Guan-Lin Chen, Chih-Hao Wang | 2025-05-13 |
| 12300723 | Transistor including downward extending silicide | Jung-Chien Cheng, Shi Ning Ju, Guan-Lin Chen, Bo-Rong Lin, Chih-Hao Wang | 2025-05-13 |
| 12300732 | Gate all around transistor with dual inner spacers | Zhi-Chang Lin, Kuan-Ting Pan, Shih-Cheng Chen, Jung-Hung Chang, Lo-Heng Chang +1 more | 2025-05-13 |
| 12300719 | Structure and formation method of semiconductor device with isolation structure | Jung-Chien Cheng, Shi Ning Ju, Guan-Lin Chen, Chih-Hao Wang | 2025-05-13 |
| 12288695 | Method of forming a transistor device having dipole-containing gate dielectric layer and fluorine-containing gate dielectric layer | Chung-Wei Hsu, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Chun-Fu Lu +1 more | 2025-04-29 |
| 12278235 | Semiconductor device with isolation structure | Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2025-04-15 |
| 12272690 | Gate isolation for multigate device | Shi Ning Ju, Zhi-Chang Lin, Shih-Cheng Chen, Chih-Hao Wang, Kuan-Ting Pan | 2025-04-08 |
| 12272732 | Method for forming epitaxial source/drain features and semiconductor devices fabricated thereof | Jung-Hung Chang, Zhi-Chang Lin, Shih-Cheng Chen, Chien Ning Yao, Chih-Hao Wang | 2025-04-08 |