Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12364165 | Methods to improve magnetic tunnel junction memory cells by treating native oxide | Meng-Yu Wu, Szu-Hua Wu, Chin-Szu Lee | 2025-07-15 |
| 12315720 | Method for improving surface of semiconductor device | Yu-Jen Chien, Szu-Hua Wu, Chin-Szu Lee, Yao-Shien Huang | 2025-05-27 |
| 12310248 | Diffusion barrier layer on interconnection vias for magnetic tunnel junctions | Jui-Hung Ho, Chin-Szu Lee, Meng-Yu Wu, Szu-Hua Wu | 2025-05-20 |
| 12274176 | Method of manufacturing MRAM device with enhanced etch control | Yu-Jen Chien, Szu-Hua Wu, Chin-Szu Lee, Meng-Yu Wu | 2025-04-08 |
| 12112930 | Method for improving deposition process | Szu-Hua Wu, Chin-Szu Lee, Yi-Lin Wang | 2024-10-08 |
| 11991930 | Memory device and method for fabricating the same | Szu-Ping Tung, Szu-Hua Wu, Shing-Chyang Pan, Meng-Yu Wu | 2024-05-21 |
| 11985904 | Method of manufacturing MRAM device with enhanced etch control | Yu-Jen Chien, Szu-Hua Wu, Chin-Szu Lee, Meng-Yu Wu | 2024-05-14 |
| 11864467 | MRAM fabrication and device | Wu Meng Yu, Szu-Hua Wu, Chin-Szu Lee, Han-Ting Tsai, Yu-Jen Chien | 2024-01-02 |
| 11844283 | Method to improve magnetic tunnel junction memory cells by treating native oxide | Meng-Yu Wu, Szu-Hua Wu, Chin-Szu Lee | 2023-12-12 |
| 11791206 | Method for forming semiconductor device | Pao-Sheng Chen, Pei-Hsuan Lee, Szu-Hua Wu, Chih-Chien Chi | 2023-10-17 |
| 11749524 | Method for improving surface of semiconductor device | Yu-Jen Chien, Szu-Hua Wu, Chin-Szu Lee, Yao-Shien Huang | 2023-09-05 |
| 11696510 | Diffusion layer for magnetic tunnel junctions | Jui-Hung Ho, Chin-Szu Lee, Meng-Yu Wu, Szu-Hua Wu | 2023-07-04 |
| 11515474 | Memory device and method for fabricating the same | Szu-Ping Tung, Szu-Hua Wu, Shing-Chyang Pan, Meng-Yu Wu | 2022-11-29 |
| 11107980 | MRAM fabrication and device | Wu Meng Yu, Szu-Hua Wu, Chin-Szu Lee, Han-Ting Tsai, Yu-Jen Chien | 2021-08-31 |
| 11031236 | Method for improving surface of semiconductor device | Yu-Jen Chien, Szu-Hua Wu, Chin-Szu Lee, Yao-Shien Huang | 2021-06-08 |
| 11022437 | Leveling sensor, load port including the same, and method of leveling a load port | Yi-Lin Wang, Chin-Szu Lee, Hua-Sheng Chiu | 2021-06-01 |
| 11024801 | Diffusion layer for magnetic tunnel junctions | Jui-Hung Ho, Chin-Szu Lee, Meng-Yu Wu, Szu-Hua Wu | 2021-06-01 |
| 10991876 | Methods to improve magnetic tunnel junction memory cells by treating native oxide | Wu Meng Yu, Szu-Hua Wu, Chin-Szu Lee | 2021-04-27 |
| 10879114 | Conductive fill | Chi-Hung Liao, Szu-Hua Wu, Liang-Yueh Ou Yang, Chin-Szu Lee | 2020-12-29 |
| 10872815 | Conductive interconnect structures in integrated circuits | Shao Tzu Lien, Chi-Hung Liao, Szu-Hua Wu, Liang-Yueh Ou Yang, Chin-Szu Lee | 2020-12-22 |
| 10862026 | Memory device | Szu-Ping Tung, Szu-Hua Wu, Shing-Chyang Pan, Meng-Yu Wu | 2020-12-08 |
| 10727118 | Method for manufacturing semiconductor device and pre-clean apparatus for semiconductor device | Pao-Sheng Chen, Pei-Hsuan Lee, Szu-Hua Wu, Chih-Chien Chi | 2020-07-28 |
| 10636702 | Conductive interconnect structures in integrated circuits | Shao Tzu Lien, Chi-Hung Liao, Szu-Hua Wu, Liang-Yueh Ou Yang, Chin-Szu Lee | 2020-04-28 |
| 10535816 | Via structure, MRAM device using the via structure and method for fabricating the MRAM device | Szu-Ping Tung, Szu-Hua Wu, Shing-Chyang Pan, Meng-Yu Wu | 2020-01-14 |
| 10533852 | Leveling sensor, load port including the same, and method of leveling a load port | Yi-Lin Wang, Chin-Szu Lee, Hua-Sheng Chiu | 2020-01-14 |