JW

Jones Wang

TSMC: 8 patents #3,198 of 12,232Top 30%
IN Intel: 1 patents #18,218 of 30,777Top 60%
Overall (All Time): #571,390 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
9754849 Organic-inorganic hybrid structure for integrated circuit packages Plory Huang, Henry Su, Chee-Key Chung, Ryan Jason Ong, Daniel Hsieh 2017-09-05
7390697 Enhanced adhesion strength between mold resin and polyimide Ken-Ching Chen, Chender Huang, Pei-Haw Tsao, Hank Huang 2008-06-24
7015066 Method for stress reduction in flip chip bump during flip chip mounting and underfill process steps of making a microelectronic assembly Pei-Haw Tsao, Chender Huang, Ken-Ching Chen 2006-03-21
6960518 Buildup substrate pad pre-solder bump manufacturing Pei-Haw Tsao, Chender Huang, Ken-Ching Chen, Hank Huang 2005-11-01
6939789 Method of wafer level chip scale packaging Chender Huang, Pei-Haw Tsao, Ken-Ching Chen 2005-09-06
6884662 Enhanced adhesion strength between mold resin and polyimide Ken-Ching Chen, Chender Huang, Pei-Haw Tsao, Hank Huang 2005-04-26
6656827 Electrical performance enhanced wafer level chip scale package with ground Pei-Haw Tsao, Chender Huang, Ken-Ching Chen, Hank Huang 2003-12-02
6638837 Method for protecting the front side of semiconductor wafers Pei-Haw Tsao, Chender Huang, Ken-Ching Chen, Hank Huang 2003-10-28
6607942 Method of fabricating as grooved heat spreader for stress reduction in an IC package Pei-Haw Tsao, Ken-Ching Chen 2003-08-19