Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12341071 | Dummy patterns in redundant region of double seal ring | Shan-Yu Huang, Hsiao-Wen Chung, Yi-Lun Chen | 2025-06-24 |
| 12300635 | Semiconductor device having functional patterns in redundant regions of double seal ring | Shan-Yu Huang, Yilun Chen | 2025-05-13 |
| 11855010 | Semiconductor structure and method for forming features in redundant region of double seal ring | Shan-Yu Huang, Shih-Chang Chen, Hsiao-Wen Chung, Yilun Chen | 2023-12-26 |
| 11728229 | Dummy patterns in redundant region of double seal ring | Shan-Yu Huang, Hsiao-Wen Chung, Yi-Lun Chen | 2023-08-15 |
| 8626580 | Coupon-point system for managing supportive services to business in a semiconductor foundry environment | Sheng-Chi Chin, Shouh-Dauh Fred Lin, Lawrence Shao-hsien Chen, Chun-Mai Liu | 2014-01-07 |
| 7378720 | Integrated stress relief pattern and registration structure | Chung-Min Fu, Yu-Chyi Harn, Hsien-Wei Chen | 2008-05-27 |
| 7323784 | Top via pattern for bond pad structure | Ho-Yin Yiu, Fu-Jier Fan, Yu-Jui Wu, Aaron Wang, Hsiang-Wei Wang +2 more | 2008-01-29 |
| 7202550 | Integrated stress relief pattern and registration structure | Chung-Min Fu, Yu-Chyi Harn, Hsien-Wei Chen | 2007-04-10 |