Issued Patents All Time
Showing 26–50 of 121 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11923433 | Fin field-effect transistor and method of forming the same | Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung +2 more | 2024-03-05 |
| 11916131 | Vertical device having a protrusion source | De-Fang Chen, Teng-Chun Tsai, Cheng-Tung Lin, Li-Ting Wang, Chun-Hung Lee +1 more | 2024-02-27 |
| 11842930 | Gap patterning for metal-to-source/drain plugs in a semiconductor device | Yu-Lien Huang, Ching-Feng Fu, Fu-Sheng Li, Tsai-Jung Ho, Bor Chiuan Hsieh +2 more | 2023-12-12 |
| 11810919 | Semiconductor device structure with conductive via structure and method for forming the same | Jyun-De Wu, Te-Chih Hsiung, Yi-Chun Chang, Yi-Chen Wang, Yuan-Tien Tu +1 more | 2023-11-07 |
| 11798943 | Transistor source/drain contacts and methods of forming the same | Yang-Cheng Wu, Yun-Hua Chen, Wen-Kuo Hsieh | 2023-10-24 |
| 11770977 | Semiconductor structure and method for forming the same | Jiann-Horng Lin, Kun-Yi Li, Han-Ting Lin, Chen-Jung Wang, Sin-Yi Yang | 2023-09-26 |
| 11769770 | Methods of forming a semiconductor device having an air spacer | Yu-Lien Huang, Che-Ming Hsu, Ching-Feng Fu | 2023-09-26 |
| 11749732 | Etch profile control of via opening | Te-Chih Hsiung, Yi-Chun Chang, Yi-Chen Wang, Yuan-Tien Tu, Jyun-De Wu | 2023-09-05 |
| 11735481 | Semiconductor device and method | Shao-Jyun Wu, Hung-Chi Wu, Chia-Ching Lee, Pin-Hsuan Yeh, Hung-Chin Chung +3 more | 2023-08-22 |
| 11728218 | Semiconductor device and method | Ching-Feng Fu, Yu-Lien Huang, Tsai-Jung Ho | 2023-08-15 |
| 11728212 | Integrated circuit structure and manufacturing method thereof | Te-Chih Hsiung, Jyun-De Wu, Peng Wang | 2023-08-15 |
| 11705491 | Etch profile control of gate contact opening | Te-Chih Hsiung, Peng Wang, Jyun-De Wu | 2023-07-18 |
| 11688606 | Tuning threshold voltage through meta stable plasma treatment | Shao-Jyun Wu, Sheng-Liang Pan | 2023-06-27 |
| 11664272 | Etch profile control of gate contact opening | Te-Chih Hsiung, Yi-Chun Chang, Jyun-De Wu, Yi-Chen Wang, Yuan-Tien Tu | 2023-05-30 |
| 11626326 | Interconnect structures for semiconductor devices and methods of manufacturing the same | Yu-Lien Huang, Ching-Feng Fu, Che-Ming Hsu | 2023-04-11 |
| 11581218 | Etch profile control of gate contact opening | Te-Chih Hsiung, Jyun-De Wu, Peng Wang | 2023-02-14 |
| 11545619 | Memory device structure and method for forming the same | Hsing-Hsiang WANG, Han-Ting Lin, Yu-Feng Yin, Sin-Yi Yang, Chen-Jung Wang +6 more | 2023-01-03 |
| 11355399 | Gap patterning for metal-to-source/drain plugs in a semiconductor device | Yu-Lien Huang, Ching-Feng Fu, Fu-Sheng Li, Tsai-Jung Ho, Bor Chiuan Hsieh +2 more | 2022-06-07 |
| 11239083 | Tuning threshold voltage through meta stable plasma treatment | Shao-Jyun Wu, Sheng-Liang Pan | 2022-02-01 |
| 11227788 | Method of forming isolation layer | Teng-Chun Tsai, Bing Chen, Chien-Hsun Wang, Cheng-Tung Lin, Chih-Tang Peng +3 more | 2022-01-18 |
| 11139211 | Selective NFET/PFET recess of source/drain regions | Yun-Min Chang, Chien-An Chen, Guan-Ren Wang, Peng Wang, Huang-Ming Chen | 2021-10-05 |
| 11127837 | Method of forming MOSFET structure | Ching-Feng Fu, Yu-Chan Yen, Chih-Hsin Ko, Chun-Hung Lee, Hui-Cheng Chang | 2021-09-21 |
| 11121025 | Layer for side wall passivation | Yun-Chang Hsu, Sheng-Liang Pan, Jack Kuo-Ping Kuo | 2021-09-14 |
| 11094545 | Self-aligned insulated film for high-K metal gate device | Jin-Aun Ng, Bao-Ru Young, Harry-Hak-Lay Chuang, Maxi Chang, Chih-Tang Peng +8 more | 2021-08-17 |
| 11081396 | Semiconductor device and method | Shao-Jyun Wu, Hung-Chi Wu, Chia-Ching Lee, Pin-Hsuan Yeh, Hung-Chin Chung +3 more | 2021-08-03 |