Issued Patents All Time
Showing 26–50 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10991628 | Etch stop layer between substrate and isolation structure | Ming-Chang Wen, Hsien-Chin Lin, Hung-Kai Chen | 2021-04-27 |
| 10978351 | Etch stop layer between substrate and isolation structure | Ming-Chang Wen, Hsien-Chin Lin, Hung-Kai Chen | 2021-04-13 |
| 10930564 | Metal gate structure cutting process | I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Ching-Feng Fu +1 more | 2021-02-23 |
| 10868003 | Creating devices with multiple threshold voltages by cut-metal-gate process | Ming-Chang Wen, Hsien-Chin Lin, Bone-Fong Wu, Ya-Hsiu Lin | 2020-12-15 |
| 10741450 | Semiconductor device having a metal gate and formation method thereof | Bone-Fong Wu, Ming-Chang Wen, Ya-Hsiu Lin | 2020-08-11 |
| 10651030 | Cut metal gate process for reducing transistor spacing | Ming-Chang Wen, Hsien-Chin Lin, Hung-Kai Chen | 2020-05-12 |
| 10573751 | Structure and method for providing line end extensions for fin-type active regions | Shao-Ming Yu, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh +2 more | 2020-02-25 |
| 10510894 | Isolation structure having different distances to adjacent FinFET devices | Ming-Ching Chang, Shu-Yuan Ku | 2019-12-17 |
| 10461078 | Creating devices with multiple threshold voltage by cut-metal-gate process | Ming-Chang Wen, Hsien-Chin Lin, Bone-Fong Wu, Ya-Hsiu Lin | 2019-10-29 |
| 10355108 | Method of forming a fin field effect transistor comprising two etching steps to define a fin structure | Feng Yuan, Hung-Ming Chen, Tsung-Lin Lee, Clement Hsingjen Wann | 2019-07-16 |
| 10319581 | Cut metal gate process for reducing transistor spacing | Ming-Chang Wen, Hsien-Chin Lin, Hung-Kai Chen | 2019-06-11 |
| 9960274 | FinFET device for device characterization | Hao Chen, Cheng-Chuan Huang, Fu-Liang Yang | 2018-05-01 |
| 9953885 | STI shape near fin bottom of Si fin in bulk FinFET | Feng Yuan, Tsung-Lin Lee, Hung-Ming Chen | 2018-04-24 |
| 9941173 | Memory cell layout | Jhon Jhy Liaw | 2018-04-10 |
| 9917192 | Structure and method for transistors with line end extension | Shao-Ming Yu, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh +2 more | 2018-03-13 |
| 9711412 | FinFETs with different fin heights | Tsung-Lin Lee, Chih Chieh Yeh, Feng Yuan | 2017-07-18 |
| 9673328 | Structure and method for providing line end extensions for fin-type active regions | Shao-Ming Yu, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh +2 more | 2017-06-06 |
| 9484462 | Fin structure of fin field effect transistor | Feng Yuan, Hung-Ming Chen, Tsung-Lin Lee, Clement Hsingjen Wann | 2016-11-01 |
| 9455348 | FinFET for device characterization | Hao Chen, Cheng-Chuan Huang, Fu-Liang Yang | 2016-09-27 |
| 9425102 | FinFETs with different fin heights | Tsung-Lin Lee, Chih Chieh Yeh, Feng Yuan | 2016-08-23 |
| 9362290 | Memory cell layout | Jhon Jhy Liaw | 2016-06-07 |
| 9324866 | Structure and method for transistor with line end extension | Shao-Ming Yu, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh +2 more | 2016-04-26 |
| RE45944 | Structure for a multiple-gate FET device and a method for its fabrication | Hung-Wei Chen, Tang-Xuang Zhong, Sheng-Da Liu, Ping-Kun Wu, Chao-Hsiung Wang +1 more | 2016-03-22 |
| 9245080 | Semiconductor device and method for making the same using semiconductor fin density design rules | Shao-Ming Yu | 2016-01-26 |
| 8941153 | FinFETs with different fin heights | Tsung-Lin Lee, Chih Chieh Yeh, Feng Yuan | 2015-01-27 |