Issued Patents All Time
Showing 51–75 of 145 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8726213 | Method and apparatus for decomposing functions in a configurable IC | Andrew Caldwell, Steven Teig | 2014-05-13 |
| 8723549 | Configurable IC having a routing fabric with storage elements | Steven Teig, Randy Renfu Huang | 2014-05-13 |
| 8664974 | Operational time extension | Andre Rohe, Steven Teig, Jason Redgrave, Andrew Caldwell | 2014-03-04 |
| 8638119 | Configurable circuits, IC's, and systems | Michael Butts, Brad Hutchings, Steven Teig | 2014-01-28 |
| 8436700 | MEMS-based switching | Sergey Gribok | 2013-05-07 |
| 8434045 | System and method of providing a memory hierarchy | Daniel Pugh, Steven Teig | 2013-04-30 |
| 8433891 | Accessing multiple user states concurrently in a configurable IC | Jason Redgrave, Brad Hutchings, Steven Teig, Teju Khubchandani | 2013-04-30 |
| 8339844 | Programmable vias for structured ASICs | Ronnie Vasishta, Adam E. Levinthal, Jonathan Park | 2012-12-25 |
| 8305110 | Non-sequentially configurable IC | Michael Butts, Brad Hutchings, Steven Teig | 2012-11-06 |
| 8248102 | Configurable IC'S with large carry chains | Jason Redgrave, Steven Teig, Brad Hutchings, Randy Renfu Huang | 2012-08-21 |
| 8230182 | System and method for providing more logical memory ports than physical memory ports | Steven Teig, Brad Hutchings | 2012-07-24 |
| 8193830 | Configurable circuits, IC's, and systems | Michael Butts, Brad Hutchings, Steven Teig | 2012-06-05 |
| 8183882 | Reconfigurable IC that has sections running at different reconfiguration rates | Steven Teig, Jason Redgrave | 2012-05-22 |
| 8115510 | Configuration network for an IC | Jason Redgrave, Teju Khubchandani | 2012-02-14 |
| 8093922 | Configurable IC having a routing fabric with storage elements | Steven Teig, Randy Renfu Huang | 2012-01-10 |
| 8067960 | Runtime loading of configuration data in a configurable IC | Brad Hutchings, Jason Redgrave, Teju Khubchandani, Steven Teig | 2011-11-29 |
| 7962705 | System and method for providing a virtual memory architecture narrower and deeper than a physical memory architecture | Andrew Caldwell, Brad Hutchings, Jason Redgrave, Steven Teig | 2011-06-14 |
| 7948266 | Non-sequentially configurable IC | Michael Butts, Brad Hutchings, Steven Teig | 2011-05-24 |
| 7932742 | Configurable IC with interconnect circuits that have select lines driven by user signals | Brad Hutchings, Steven Teig | 2011-04-26 |
| 7930666 | System and method of providing a memory hierarchy | Daniel Pugh, Steven Teig | 2011-04-19 |
| 7898291 | Operational time extension | Andre Rohe, Steven Teig, Jason Redgrave, Andrew Caldwell | 2011-03-01 |
| 7872496 | Method of mapping a user design defined for a user design cycle to an IC with multiple sub-cycle reconfigurable circuits | Michael Butts, Brad Hutchings, Steven Teig | 2011-01-18 |
| 7839166 | Configurable IC with logic resources with offset connections | Steven Teig, Brad Hutchings, Randy Renfu Huang | 2010-11-23 |
| 7804730 | Method and apparatus for accessing contents of memory cells | Jason Redgrave | 2010-09-28 |
| 7797497 | System and method for providing more logical memory ports than physical memory ports | Steven Teig, Brad Hutchings | 2010-09-14 |