Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12002530 | Embedded memory transparent in-system built-in self-test | Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian | 2024-06-04 |
| 11023310 | Detection of address errors in memory devices using multi-segment error detection codes | Hayk Grigoryan, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian | 2021-06-01 |
| 10789398 | Method and apparatus for SOC with optimal RSMA | Suren Martirosyan, Gurgen Harutyunyan, Yervant Zorian | 2020-09-29 |
| 10192635 | FinFET-based memory testing using multiple read operations | Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian | 2019-01-29 |
| 10115477 | FinFET-based memory testing using multiple read operations | Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian | 2018-10-30 |
| 9831000 | Testing electronic memories based on fault and test algorithm periodicity | Aram Hakhumyan, Gurgen Harutyunyan, Valery Vardanian, Yervant Zorian | 2017-11-28 |
| 9514258 | Generation of memory structural model based on memory layout | Karen Amirkhanyan, Karen Darbinyan, Arman Davtyan, Gurgen Harutyunyan, Valery Vardanian +1 more | 2016-12-06 |
| 9053050 | Determining a desirable number of segments for a multi-segment single error correcting coding scheme | Hayk Grigoryan, Gurgen Harutyunyan, Valery Vardanian, Yervant Zorian | 2015-06-09 |
| 8850277 | Detecting random telegraph noise induced failures in an electronic memory | Karen Amirkhanyan, Hayk Grigoryan, Gurgen Harutyunyan, Tatevik Melkumyan, Alex Shubat +2 more | 2014-09-30 |
| 8112730 | Various methods and apparatuses for memory modeling using a structural primitive verification for memory compilers | Karen Aleksanyan, Karen Amirkhanyan, Sergey Karapetyan, Alexander Shubat, Valery Vardanian +1 more | 2012-02-07 |
| 7768840 | Memory modeling using an intermediate level structural description | Karen Aleksanyan, Karen Amirkhanyan, Valery Vardanian, Yervant Zorian | 2010-08-03 |