KK

Kayhan Kucukcakar

SY Synopsys: 13 patents #57 of 2,302Top 3%
Motorola: 6 patents #1,752 of 12,470Top 15%
AN Ansys: 1 patents #133 of 298Top 45%
UN Unknown: 1 patents #29,356 of 83,584Top 40%
Overall (All Time): #181,522 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11556685 Time-based power analysis Han Young Koh 2023-01-17
11295353 Collaborative peer review search system and method of use 2022-04-05
10969936 Collaborative peer review system and method of use 2021-04-06
10133448 Collaborative peer review system and method of use 2018-11-20
8813011 Clock-reconvergence pessimism removal in hierarchical static timing analysis Sarvesh Bhardwaj, Khalid Rahmat 2014-08-19
8775855 Reducing memory used to store totals in static timing analysis Sarvesh Bhardwaj, Khalid Rahmat, Rachid Helaihel 2014-07-08
8701075 Recursive hierarchical static timing analysis Florentin Dartu, Patrick D. Fortner, Qiuyang Wu 2014-04-15
8615727 Simultaneous multi-corner static timing analysis using samples-based static timing infrastructure Praveen Ghanta, Amit Goel, Feroze P. Taraporevala, Marina Ovchinnikov, Jinfeng Liu 2013-12-24
8443328 Recursive hierarchical static timing analysis Florentin Dartu, Patrick D. Fortner, Qiuyang Wu 2013-05-14
8434040 Clock-reconvergence pessimism removal in hierarchical static timing analysis Sarvesh Bhardwaj, Khalid Rahmat 2013-04-30
7774731 Characterizing sequential cells using interdependent setup and hold times, and utilizing the sequential cell characterizations in static timing analysis Ali Dasdan, Emre Salman, Feroze P. Taraporevala 2010-08-10
7739098 System and method for providing distributed static timing analysis with merged results Steve Hollands, Brian Clerkin, Loa Mize, Qiuyang Wu, Subramanyam Sripada +1 more 2010-06-15
7650580 Method and apparatus for determining the performance of an integrated circuit Ali Dasdan, Halim Damerdji 2010-01-19
7552409 Engineering change order process optimization Jing C. Lin, Jinan Lou 2009-06-23
7506293 Characterizing sequential cells using interdependent setup and hold times, and utilizing the sequential cell characterizations in static timing analysis Ali Dasdan, Emre Salman, Feroze P. Taraporevala 2009-03-17
7237212 Method and apparatus for reducing timing pessimism during static timing analysis Ali Dasdan 2007-06-26
6964027 System and method for optimizing exceptions Rachid Helaihel 2005-11-08
6138229 Customizable instruction set processor with non-configurable/configurable decoding units and non-configurable/configurable execution units Chih-Tung Chen 2000-10-24
5912819 Method for designing an architectural system Chih-Tung Chen, Wilhelmus J. M. Philipsen, Thomas E. Tkacik 1999-06-15
5907698 Method and apparatus for characterizing static and dynamic operation of an architectural system Chih-Tung Chen, Jie Gong, Thomas E. Tkacik 1999-05-25
5774368 Controller structure template and method for designing a controller structure Chih-Tung Chen, Thomas E. Tkacik, Rajesh Gupta 1998-06-30
5600567 Method of graphically displaying and manipulating clock-based scheduling of HDL statements Rajesh Gupta, Thomas E. Tkacik 1997-02-04
5533179 Apparatus and method of modifying hardware description language statements Rajesh Gupta, Thomas E. Tkacik 1996-07-02