QW

Qiuyang Wu

SY Synopsys: 8 patents #127 of 2,302Top 6%
Overall (All Time): #610,431 of 4,157,543Top 15%
8
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11922106 Memory efficient scalable distributed static timing analysis using structure based self-aligned parallel partitioning Abhishek Nandi, Yogesh Dilip Save 2024-03-05
10423742 Method to perform full accuracy hierarchical block level timing analysis with parameterized chip level contexts Martin Ranke, Min Li 2019-09-24
9754069 Determining slack estimates for multiple instances of a cell in a hierarchical circuit design Chang Zhao 2017-09-05
8701075 Recursive hierarchical static timing analysis Florentin Dartu, Patrick D. Fortner, Kayhan Kucukcakar 2014-04-15
8473886 Parallel parasitic processing in static timing analysis Subramanyam Sripada, Patrick D. Fortner 2013-06-25
8443328 Recursive hierarchical static timing analysis Florentin Dartu, Patrick D. Fortner, Kayhan Kucukcakar 2013-05-14
8261220 Path preserving design partitioning with redundancy Brian Clerkin 2012-09-04
7739098 System and method for providing distributed static timing analysis with merged results Kayhan Kucukcakar, Steve Hollands, Brian Clerkin, Loa Mize, Subramanyam Sripada +1 more 2010-06-15