Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11887948 | Integrated circuit chip including a passivation nitride layer in contact with a high voltage bonding pad and method of making | Elisabetta Pizzi, Daria DORIA | 2024-01-30 |
| 11469136 | Semiconductor structure with partially embedded insulation region and related method | Fabrizio Fausto Renzo Toia, Marco Sambi, Davide Giuseppe Patti, Marco Morelli, Giuseppe Barillaro | 2022-10-11 |
| 10930799 | Semiconductor die with buried capacitor, and method of manufacturing the semiconductor die | Flavio Francesco Villa, Marco Morelli, Marco Marchesi, Fabrizio Fausto Renzo Toia | 2021-02-23 |
| 10796942 | Semiconductor structure with partially embedded insulation region | Fabrizio Fausto Renzo Toia, Marco Sambi, Davide Giuseppe Patti, Marco Morelli, Giuseppe Barillaro | 2020-10-06 |
| 10062757 | Semiconductor device with buried metallic region, and method for manufacturing the semiconductor device | Fabrizio Fausto Renzo Toia, Claudio Contiero, Elisabetta Pizzi | 2018-08-28 |
| 9640614 | Integrated device with raised locos insulation regions and process for manufacturing such device | Alessandro Causio, Paolo Colpani | 2017-05-02 |
| 8941176 | Integrated device with raised locos insulation regions and process for manufacturing such device | Alessandro Causio, Paolo Colpani | 2015-01-27 |
| 8871594 | Process for manufacturing power integrated devices having surface corrugations, and power integrated device having surface corrugations | Andrea Paleari, Stephane Wen Yung Bach, Paolo Gattari | 2014-10-28 |