Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10818368 | Level shifter circuit having two-domain level shifting capability | Antonino Conte, Leopoldo Maria Marino, Maurizio Francesco Perroni | 2020-10-27 |
| 10249373 | Circuit and method for reading a memory cell of a non-volatile memory device | Giovanni Campardo | 2019-04-02 |
| 10186317 | Phase change memory device and method of operation | Maurizio Francesco Perroni, Carmelo Paolino | 2019-01-22 |
| 10115462 | Address decoder for a non-volatile memory array using MOS selection transistors | Maurizio Francesco Perroni | 2018-10-30 |
| 10002672 | Memory device with progressive row reading and related reading method | Giovanni Campardo | 2018-06-19 |
| 9972394 | Level shifter circuit and associated memory device | Antonino Conte, Carmelo Paolino, Maurizio Francesco Perroni | 2018-05-15 |
| 9966145 | Row decoder for a non-volatile memory device, and non-volatile memory device | Giovanni Campardo | 2018-05-08 |
| 9865356 | Circuit and method for reading a memory cell of a non-volatile memory device | Giovanni Campardo | 2018-01-09 |
| 9865346 | Phase change memory device and method of operation | Maurizio Francesco Perroni, Carmelo Paolino | 2018-01-09 |
| 9805810 | Memory device with progressive row reading and related reading method | Giovanni Campardo | 2017-10-31 |
| 9767907 | Row decoder for a non-volatile memory device, having reduced area occupation | Giovanni Campardo | 2017-09-19 |
| 9679655 | Row decoder for a non-volatile memory device, and non-volatile memory device | Giovanni Campardo | 2017-06-13 |
| 8982612 | Row decoder circuit for a phase change non-volatile memory device | Maurizio Francesco Perroni, Guido Desandre, Giuseppe Castagna | 2015-03-17 |
| 7916526 | Protection register for a phase-change memory | Enzo M. Donze, Greg Komoto | 2011-03-29 |
| 7519751 | Method of generating an enable signal of a standard memory core and relative memory device | Maurizio Francesco Perroni, Andrea Scavuzzo | 2009-04-14 |
| 7408377 | Driving circuit of an output buffer stage having a high speed and a reduced noise induced on power supply | Giuseppe Castagna, Salvatore Imbesi, Salvatore Mazzara | 2008-08-05 |
| 7376810 | Integrated device with multiple reading and/or writing commands | Maurizio Francesco Perroni, Salvatore Mazzara | 2008-05-20 |
| 7151705 | Non-volatile memory device architecture, for instance a flash kind, having a serial communication interface | Maurizio Francesco Perroni, Paolino Schillaci | 2006-12-19 |
| 7139397 | Hybrid architecture for realizing a random numbers generator | Marco Messina, Giulio Mangione | 2006-11-21 |
| 6996697 | Method of writing a group of data bytes in a memory and memory device | Salvatore Poli, Paolino Schillaci | 2006-02-07 |
| 6990596 | Memory device outputting read data in a time starting from a rising edge of an external clock that is shorter than that of known devices | Maurizio Francesco Perroni | 2006-01-24 |
| 6975559 | Device and method for reading non-volatile memories having at least one pseudo-parallel communication interface | Maurizio Francesco Perroni, Salvatore Poli | 2005-12-13 |
| 6927991 | Memory device accessible with different communication protocols | Maurizio Francesco Perroni, Andrea Scavuzzo | 2005-08-09 |
| 6894914 | Nonvolatile memory device with parallel and serial functioning mode and selectable communication protocol | Maurizio Francesco Perroni | 2005-05-17 |
| 6892269 | Nonvolatile memory device with double serial/parallel communication interface | Salvatore Poli, Maurizio Francesco Perroni | 2005-05-10 |