Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Address decoder for a non-volatile memory array using MOS selection transistors

Address decoder for a non-volatile memory array using MOS selection transistors

US Patent 10115462 · Granted Oct 30, 2018

Estimated economic value: $7,428,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Phase change memory device, system including the memory device, and method for o2023
Non volatile memory device with an asymmetric row decoder and method for selecti2022
Memory device and method for coupling a main bitline to two points of a local bi2022
Method for programming a phase-change memory device of differential type, phase-2022
Phase change memory device, system including the memory device, and method for o2022
Bit-line voltage generation circuit for a non-volatile memory device and corresp2022
Non-volatile memory device including a row decoder with a pull-up stage controll2022
Level shifter circuit having two-domain level shifting capability2020
Level shifter circuit having two-domain level shifting capability2020
Memory device with internal measurement of functional parameters2020
Circuit and method for reading a memory cell of a non-volatile memory device2019
Phase change memory device and method of operation2019