Issued Patents All Time
Showing 51–75 of 146 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7719894 | Method of programming cells of a NAND memory device | Luca Crippa, Roberto Ravasio | 2010-05-18 |
| 7630238 | Page buffer for multi-level NAND electrically-programmable semiconductor memories | Luca Crippa | 2009-12-08 |
| 7592849 | Level shifter for semiconductor memory device implemented with low-voltage transistors | Giovanni Campardo | 2009-09-22 |
| 7581153 | Memory with embedded error correction codes | Roberto Ravasio, Angelo Bovino, Vincenzo Altieri | 2009-08-25 |
| 7532061 | Charge-pump type, voltage-boosting device with reduced ripple, in particular for non-volatile flash memories | Giancarlo Ragone, Miriam Sangalli, Luca Crippa | 2009-05-12 |
| 7529136 | Method for compacting the erased threshold voltage distribution of flash memory devices during writing operations | Luca Crippa, Roberto Ravasio, Federico Pio | 2009-05-05 |
| 7521983 | High-voltage switch with low output ripple for non-volatile floating-gate memories | Giancarlo Ragone, Luca Crippa, Miriam Sangalli | 2009-04-21 |
| 7499345 | Non-volatile memory implemented with low-voltages transistors and related system and method | Giovanni Campardo, Luca Crippa, Giancarlo Ragone, Miram Sangalli | 2009-03-03 |
| 7499332 | Circuit and method for electrically programming a non-volatile semiconductor memory via an additional programming pulse after verification | Luca Crippa | 2009-03-03 |
| 7474577 | Circuit and method for retrieving data stored in semiconductor memory cells | Luca Crippa, Giancarlo Ragone, Miriam Sangalli | 2009-01-06 |
| 7444543 | Data control unit capable of correcting boot errors, and corresponding self-correction method | Irene Babudri, Marco Roveda | 2008-10-28 |
| 7408819 | Semiconductor memory device with a page buffer having an improved layout arrangement | Luca Crippa | 2008-08-05 |
| 7394694 | Flash memory device with NAND architecture with reduced capacitive coupling effect | Roberto Ravasio, Ilaria Motta | 2008-07-01 |
| 7382660 | Method for accessing a multilevel nonvolatile memory device of the flash NAND type | Angelo Bovino, Vincenzo Altieri, Roberto Ravasio, Mario De Matteis | 2008-06-03 |
| 7366014 | Double page programming system and method | Luca Crippa, Roberto Ravasio | 2008-04-29 |
| 7362616 | NAND flash memory with erase verify based on shorter evaluation time | Angelo Bovino, Roberto Ravasio | 2008-04-22 |
| 7349265 | Reading method of a NAND-type memory device and NAND-type memory device | Luca Crippa, Chiara Missiroli | 2008-03-25 |
| 7336538 | Page buffer circuit and method for multi-level NAND programmable memories | Luca Crippa, Chiara Missiroli, Roberto Ravasio, Angelo Bovino | 2008-02-26 |
| 7328397 | Method for performing error corrections of digital information codified as a symbol sequence | Massimiliano Lunelli, Roberto Ravasio, Alessia Marelli | 2008-02-05 |
| 7260005 | Data bus architecture for a semiconductor memory | Luca Crippa, Miriam Sangalli | 2007-08-21 |
| 7221212 | Trimming functional parameters in integrated circuits | Luca Crippa, Miriam Sangalli, Salvatrice Scommegna | 2007-05-22 |
| 7221602 | Memory system comprising a semiconductor memory | Roberto Ravasio | 2007-05-22 |
| 7184348 | Sensing circuit for a semiconductor memory | Luca Crippa | 2007-02-27 |
| 7184319 | Method for erasing non-volatile memory cells and corresponding memory device | Giovanni Campardo | 2007-02-27 |
| 7068540 | Method and device for programming an electrically programmable non-volatile semiconductor memory | Roberto Ravasio | 2006-06-27 |