GD

Giuseppe Desoli

SS Stmicroelectronics Sa: 37 patents #47 of 4,662Top 2%
SN Stmicroelectronics International N.V.: 35 patents #4 of 696Top 1%
HP HP: 6 patents #2,937 of 16,619Top 20%
SS Stmicroelectronics (Grenoble 2) Sas: 1 patents #277 of 573Top 50%
Overall (All Time): #66,121 of 4,157,543Top 2%
44
Patents All Time

Issued Patents All Time

Showing 25 most recent of 44 patents

Patent #TitleCo-InventorsDate
12411696 Programmable hardware accelerator controller Paolo Sergio ZAMBOTTI, Thomas Boesch, Wolfgang Betz, David Siorpaes 2025-09-09
12386506 Tagged memory operated at lower VMIN in error tolerant system Nitin Chawla, Anuj Grover, Thomas Boesch, Surinder Singh, Manuj AYODHYAWASI 2025-08-12
12361268 Neural network hardware accelerator circuit with requantization circuits Surinder Singh, Thomas Boesch 2025-07-15
12292780 Computing system power management device, system and method Nitin Chawla, Anuj Grover, Kedar Janardan Dhori, Thomas Boesch, Promod Kumar 2025-05-06
12190243 Arithmetic unit for deep learning acceleration Surinder Singh, Thomas Boesch 2025-01-07
12118451 Deep convolutional network heterogeneous architecture Thomas Boesch, Nitin Chawla, Surinder Singh, Elio Guidetti, Fabio Giuseppe DE AMBROGGI +2 more 2024-10-15
12106201 Reconfigurable hardware buffer in a neural networks accelerator framework Carmine CAPPETTA, Thomas Boesch 2024-10-01
12073308 Hardware accelerator engine Thomas Boesch 2024-08-27
11977971 Data volume sculptor for deep learning acceleration Surinder Singh, Thomas Boesch 2024-05-07
11900240 Variable clock adaptation in neural network processors Nitin Chawla, Manuj AYODHYAWASI, Thomas Boesch, Surinder Singh 2024-02-13
11880759 Vector quantization decoding hardware unit for real-time dynamic decompression for parameters of neural networks Carmine CAPPETTA, Thomas Boesch, Surinder Singh, Saumya Suneja 2024-01-23
11836346 Tagged memory operated at lower vmin in error tolerant system Nitin Chawla, Anuj Grover, Thomas Boesch, Surinder Singh, Manuj AYODHYAWASI 2023-12-05
11836608 Convolution acceleration with embedded vector decompression Thomas Boesch, Surinder Singh, Carmine CAPPETTA 2023-12-05
11829730 Elements for in-memory compute Nitin Chawla, Tanmoy Roy, Anuj Grover 2023-11-28
11823771 Streaming access memory device, system and method Nitin Chawla, Thomas Boesch, Anuj Grover, Surinder Singh 2023-11-21
11740870 Convolutional network hardware accelerator device, system and method Thomas Boesch, Carmine CAPPETTA, Ugo Maria Iannuzzi 2023-08-29
11726543 Computing system power management device, system and method Nitin Chawla, Anuj Grover, Kedar Janardan Dhori, Thomas Boesch, Promod Kumar 2023-08-15
11710032 Pooling unit for deep learning acceleration Surinder Singh, Thomas Boesch 2023-07-25
11687762 Acceleration unit for a deep learning engine Surinder Singh, Thomas Boesch 2023-06-27
11675943 Tool to create a reconfigurable interconnect framework Thomas Boesch 2023-06-13
11610362 Data volume sculptor for deep learning acceleration Surinder Singh, Thomas Boesch 2023-03-21
11593609 Vector quantization decoding hardware unit for real-time dynamic decompression for parameters of neural networks Carmine CAPPETTA, Thomas Boesch, Surinder Singh, Saumya Suneja 2023-02-28
11586907 Arithmetic unit for deep learning acceleration Surinder Singh, Thomas Boesch 2023-02-21
11562115 Configurable accelerator framework including a stream switch having a plurality of unidirectional stream links Thomas Boesch 2023-01-24
11531873 Convolution acceleration with embedded vector decompression Thomas Boesch, Surinder Singh, Carmine CAPPETTA 2022-12-20