Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7326615 | Method for manufacturing electronic non-volatile memory devices integrated in a semiconductor substrate | Alessia Pavan, Giorgio Servalli | 2008-02-05 |
| 7125807 | Method for manufacturing non-volatile memory cells on a semiconductor substrate | Alessia Pavan, Livio Baldi | 2006-10-24 |
| 7125808 | Method for manufacturing non-volatile memory cells on a semiconductor substrate | Alessia Pavan, Livio Baldi | 2006-10-24 |
| 6800901 | Process for the selective formation of salicide on active areas of MOS devices | Maurizio Moroni | 2004-10-05 |
| 6603171 | Electronic devices with nonvolatile memory cells of reduced dimensions | Alessandro Grossi | 2003-08-05 |
| 6509222 | Process for manufacturing electronic devices comprising nonvolatile memory cells of reduced dimensions | Alessandro Grossi | 2003-01-21 |
| 6492234 | Process for the selective formation of salicide on active areas of MOS devices | Maurizio Moroni | 2002-12-10 |
| 6448138 | Nonvolatile floating-gate memory devices, and process of fabrication | Gabriella Ghidini, Mauro Alessandri | 2002-09-10 |
| 6255163 | Process for manufacturing selection transistors for nonvolatile serial-flash, EPROM, EEPROM and flash-EEPROM memories in standard or AMG configuration | Nicola Zatelli, Carlo Cremonesi, Federico Pio | 2001-07-03 |
| 6248630 | Process for forming an integrated circuit comprising non-volatile memory cells and side transistors and corresponding IC | Gabriella Ghidini, Carlo Riva | 2001-06-19 |
| 6114203 | Method of manufacturing a MOS integrated circuit having components with different dielectrics | Gabriella Ghidini | 2000-09-05 |
| 6004847 | Process for forming an integrated circuit comprising non-volatile memory cells and side transistors and corresponding IC | Gabriella Ghidini, Carlo Riva | 1999-12-21 |
| 5977586 | Non-volatile integrated low-doped drain device with partially overlapping gate regions | Giuseppe Crisenza | 1999-11-02 |
| 5856221 | Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC | Gabriella Ghidini, Carlo Riva | 1999-01-05 |
| 5798279 | Method of fabricating non-volatile memories with overlapping layers | Giuseppe Crisenza | 1998-08-25 |
| 5600166 | EPROM cell with a readily scalable interpoly dielectric | Gabriella Ghidini, Marina Tosi | 1997-02-04 |
| 5568418 | Non-volatile memory in an integrated circuit | Giuseppe Crisenza | 1996-10-22 |
| 5464784 | Method of fabricating integrated devices | Giuseppe Crisenza | 1995-11-07 |
| 5422291 | Method of making an EPROM cell with a readily scalable interpoly dielectric | Gabriella Ghidini, Marina Tosi | 1995-06-06 |