Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10613993 | Method for protecting a program code, corresponding system and processor | — | 2020-04-07 |
| 10598728 | Scan chain circuit supporting logic self test pattern injection during run time | — | 2020-03-24 |
| 9897653 | Scan chain circuit supporting logic self test pattern injection during run time | — | 2018-02-20 |
| 7281119 | Selective vertical and horizontal dependency resolution via split-bit propagation in a mixed-architecture system having superscalar and VLIW modes | Andrew Cofler, Laurent Ducousso | 2007-10-09 |
| 7111152 | Computer system that operates in VLIW and superscalar modes and has selectable dependency control | Andrew Cofler, Laurent Ducousso | 2006-09-19 |
| 6807626 | Execution of a computer program | Andrew Cofler, Stéphane Bouvier, Laurent Ducousso | 2004-10-19 |
| 6732276 | Guarded computer instruction execution | Andrew Cofler, Laurent Ducousso | 2004-05-04 |
| 6546467 | Cache coherency mechanism using an operation to be executed on the contents of a location in a cache specifying an address in main memory | Glenn Ashley Farrall, Catherine Louise Barnaby | 2003-04-08 |
| 6453385 | Cache system | Andrew Sturges, David May, Glenn Ashley Farrall, Catherine Louise Barnaby | 2002-09-17 |
| 5410506 | Memory integrated circuit with protection against disturbances | Richard Ferrant | 1995-04-25 |