Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12287862 | Systems, devices, and methods for dynamic allocation | Sandeep Vangipuram, Albrecht Mayer, Frank Hellwig | 2025-04-29 |
| 12056253 | Interconnection of protected information between components | Ketan Dewan, Trevor Bird, Simon Cottam, Darren Galpin, Frank Hellwig +4 more | 2024-08-06 |
| 12032960 | Flexible support for device emulation and bank swapping | Sandeep Vangipuram | 2024-07-09 |
| 11989145 | Write busy signaling for interface structures | Frank Hellwig, Darren Galpin, Sandeep Vangipuram | 2024-05-21 |
| 11789739 | Control system for process data and method for controlling process data | Albrecht Mayer | 2023-10-17 |
| 11288404 | Resource protection | Albrecht Mayer, Frank Hellwig | 2022-03-29 |
| 10996956 | Control system for process data and method for controlling process data | Albrecht Mayer | 2021-05-04 |
| 10992750 | Service request interrupt router for virtual interrupt service providers | Frank Hellwig, Gerhard Wirrer | 2021-04-27 |
| 10592395 | Control system and method of memory access | Albrecht Mayer | 2020-03-17 |
| 10592270 | Safety hypervisor function | Simon Brewerton, Neil Hastie, Frank Hellwig, Richard Knight, Antonio Vilela | 2020-03-17 |
| 10372630 | Memory protecting unit and method for protecting a memory address space | Frank Hellwig, Gerhard Wirrer | 2019-08-06 |
| 10248595 | Virtual machine monitor interrupt support for computer processing unit (CPU) | Frank Hellwig, Gerhard Wirrer, Neil Hastie | 2019-04-02 |
| 9836318 | Safety hypervisor function | Simon Brewerton, Neil Hastie, Frank Hellwig, Richard Knight, Antonio Vilela | 2017-12-05 |
| 9118351 | System and method for signature-based redundancy comparison | Antonio Vilela, Rainer Faller, Michael Goessel, Simon Brewerton, Neil Hastie +4 more | 2015-08-25 |
| 8880961 | System and method of computation by signature analysis | Simon Brewerton, Neil Hastie, Boyko Traykov, Antonio Vilela | 2014-11-04 |
| 8560899 | Safe memory storage by internal operation verification | Simon Brewerton, Neil Hastie, Paul Hubbert, Klaus Oberlaender, Robert Wiesner +2 more | 2013-10-15 |
| 7793261 | Interface for transferring debug information | David A. Edwards, Margaret Rose Gearty, Atsushi Hasegawa, Anthony Willis Rich | 2010-09-07 |
| 6546467 | Cache coherency mechanism using an operation to be executed on the contents of a location in a cache specifying an address in main memory | Bruno Fel, Catherine Louise Barnaby | 2003-04-08 |
| 6460105 | Method and system for transmitting interrupts from a peripheral device to another device in a computer system | Andrew Michael Jones, Andrew Keith Betts, Brian Foster, Andrew Sturges | 2002-10-01 |
| 6457118 | Method and system for selecting and using source operands in computer system instructions | Chih-Jui Peng, Sivaram Krishnan | 2002-09-24 |
| 6453385 | Cache system | Andrew Sturges, David May, Bruno Fel, Catherine Louise Barnaby | 2002-09-17 |
| 6378064 | Microcomputer | David A. Edwards | 2002-04-23 |