Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12181912 | Circuit with load jump mitigation | Dyson Wilkes, Miqdad Haji, Mark Selby | 2024-12-31 |
| 11301249 | Handling exceptions in a program | Albrecht Mayer, Pawel Jewstafjew | 2022-04-12 |
| 11096578 | Device comprising an overlay mechanism, system with devices each comprising an overlay mechanism with an individually programmable delay or method for overlaying data | — | 2021-08-24 |
| 10653315 | Device comprising an overlay mechanism, system with devices each comprising an overlay mechanism with an individually programmable delay or method for overlaying data | — | 2020-05-19 |
| 10592270 | Safety hypervisor function | Simon Brewerton, Glenn Ashley Farrall, Frank Hellwig, Richard Knight, Antonio Vilela | 2020-03-17 |
| 10248595 | Virtual machine monitor interrupt support for computer processing unit (CPU) | Frank Hellwig, Gerhard Wirrer, Glenn Ashley Farrall | 2019-04-02 |
| 9891917 | System and method to increase lockstep core availability | Simon Brewerton | 2018-02-13 |
| 9836318 | Safety hypervisor function | Simon Brewerton, Glenn Ashley Farrall, Frank Hellwig, Richard Knight, Antonio Vilela | 2017-12-05 |
| 9118351 | System and method for signature-based redundancy comparison | Antonio Vilela, Rainer Faller, Michael Goessel, Simon Brewerton, Glenn Ashley Farrall +4 more | 2015-08-25 |
| 8954794 | Method and system for detection of latent faults in microcontrollers | Simon Brewerton | 2015-02-10 |
| 8880961 | System and method of computation by signature analysis | Simon Brewerton, Glenn Ashley Farrall, Boyko Traykov, Antonio Vilela | 2014-11-04 |
| 8560899 | Safe memory storage by internal operation verification | Simon Brewerton, Paul Hubbert, Klaus Oberlaender, Robert Wiesner, Antonio Vilela +2 more | 2013-10-15 |
| 8516356 | Real-time error detection by inverse processing | Simon Brewerton | 2013-08-20 |
| 7673123 | System and method for classifying branch instructions into multiple classes for branch prediction | Graham Donohoe | 2010-03-02 |
| 7454598 | Controlling out of order execution pipelines issue tagging | — | 2008-11-18 |
| 7260707 | Variable length instruction pipeline | Erik K. Norden, Roger D. Arnold, Robert E. Ober | 2007-08-21 |
| 6859873 | Variable length instruction pipeline | Erik K. Norden, Roger D. Arnold, Robert E. Ober | 2005-02-22 |
| 5469378 | Content addressable memory having match line transistors connected in series and coupled to current sensing circuit | Richard Albon | 1995-11-21 |
| 5463327 | Programmable multiplexer logic cell | — | 1995-10-31 |
| 5418480 | Logic cell using only two N type transistors for generating each logic function | David Williams | 1995-05-23 |
| 5046047 | Circuit arrangement for verifying data stored in a random access memory | Richard G. Cliff | 1991-09-03 |