Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11586553 | Error cache system with coarse and fine segments for power optimization | Neal Berger, Susmita Karmakar, Kuk-Hwan Kim | 2023-02-21 |
| 11580014 | Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments | Neal Berger, Susmita Karmakar, Kuk-Hwan Kim | 2023-02-14 |
| 11119910 | Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments | Neal Berger, Susmita Karmakar, Kuk-Hwan Kim | 2021-09-14 |
| 11119936 | Error cache system with coarse and fine segments for power optimization | Neal Berger, Susmita Karmakar, Kuk-Hwan Kim | 2021-09-14 |
| 10546625 | Method of optimizing write voltage based on error buffer occupancy | Neal Berger, Benjamin Louie, Kuk-Hwan Kim | 2020-01-28 |
| 9281028 | Method and circuit for glitch reduction in memory read latch circuit | Yong Qin, Thu Nguyen | 2016-03-08 |