Issued Patents All Time
Showing 26–50 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10546625 | Method of optimizing write voltage based on error buffer occupancy | Benjamin Louie, Kuk-Hwan Kim, TaeJin Pyon | 2020-01-28 |
| 10546624 | Multi-port random access memory | Mourad El-Baraji, Lester Crudele, Benjamin Louie | 2020-01-28 |
| 10529439 | On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects | Benjamin Louie, Mourad El-Baraji, Lester Crudele | 2020-01-07 |
| 10489245 | Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them | Benjamin Louie, Mourad El-Baraji, Lester Crudele | 2019-11-26 |
| 10481976 | Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers | Benjamin Louie, Mourad El-Baraji, Lester Crudele | 2019-11-19 |
| 10460781 | Memory device with a dual Y-multiplexer structure for performing two simultaneous operations on the same row of a memory bank | Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel L. Hillman | 2019-10-29 |
| 10446210 | Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registers | Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel L. Hillman | 2019-10-15 |
| 10437723 | Method of flushing the contents of a dynamic redundancy register to a secure storage area during a power down in a memory device | Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel L. Hillman | 2019-10-08 |
| 10437491 | Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy register | Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel L. Hillman | 2019-10-08 |
| 10424393 | Method of reading data from a memory device using multiple levels of dynamic redundancy registers | Mourad El Baraji, Benjamin Louie, Lester Crudele, Daniel L. Hillman, Barry A. Hoberman | 2019-09-24 |
| 10395712 | Memory array with horizontal source line and sacrificial bitline per virtual source | Mourad El Baraji, Lester Crudele, Benjamin Louie | 2019-08-27 |
| 10395711 | Perpendicular source and bit lines for an MRAM array | Benjamin Louie, Mourad El Baraji, Lester Crudele | 2019-08-27 |
| 10366775 | Memory device using levels of dynamic redundancy registers for writing a data word that failed a write operation | Mourad El-Baraji, Benjamin Louie, Lester Crudele, Daniel L. Hillman, Barry A. Hoberman | 2019-07-30 |
| 10366774 | Device with dynamic redundancy registers | Mourad El Baraji, Benjamin Louie, Lester Crudele, Daniel L. Hillman, Barry A. Hoberman | 2019-07-30 |
| 10360962 | Memory array with individually trimmable sense amplifiers | Susmita Karmakar, Mourad El Baraji, Benjamin Louie | 2019-07-23 |
| 10360964 | Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device | Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel L. Hillman | 2019-07-23 |
| 10347314 | Method and apparatus for bipolar memory write-verify | Ben Louie, Mourad El-Baraji | 2019-07-09 |
| 10192602 | Smart cache design to prevent overflow for a memory device with a dynamic redundancy register | Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel L. Hillman | 2019-01-29 |
| 10192601 | Memory instruction pipeline with an additional write stage in a memory device that uses dynamic redundancy registers | Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel L. Hillman | 2019-01-29 |
| 10163479 | Method and apparatus for bipolar memory write-verify | Ben Louie, Mourad El-Baraji | 2018-12-25 |
| 10115446 | Spin transfer torque MRAM device with error buffer | Benjamin Louie | 2018-10-30 |
| 10115451 | Memory device comprising electrically floating body transistor | Jin-Woo Han, Yuniarto Widjaja | 2018-10-30 |
| 9799392 | Memory device comprising electrically floating body transistor | Jin-Woo Han, Yuniarto Widjaja | 2017-10-24 |
| 9679626 | Self-referenced magnetic random access memory | Jean-Pierre Nozieres | 2017-06-13 |
| 9496053 | Memory device comprising electrically floating body transistor | Jin-Woo Han, Yuniarto Widjaja | 2016-11-15 |