Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5617563 | Duty cycle independent tunable clock | Pradip Banerjee, Atul V. Ghia | 1997-04-01 |
| 5577228 | Digital circuit for performing multicycle addressing in a digital memory | Pradip Banerjee, Atul V. Ghia, Simon Lau | 1996-11-19 |
| 5537355 | Scheme to test/repair multiple large RAM blocks | Pradip Banerjee, Atul V. Ghia | 1996-07-16 |
| 5528541 | Charge shared precharge scheme to reduce compare output delays | Atul V. Ghia, Pradip Banerjee | 1996-06-18 |
| 5515024 | High performance dynamic compare circuit | Atul V. Ghia, Pradip Banerjee | 1996-05-07 |
| 5459416 | Sense amplifier common mode dip filter circuit to avoid false misses | Atul V. Ghia, Pradip Banerjee | 1995-10-17 |
| 5121013 | Noise reducing output buffer circuit with feedback path | Robert L. Yau, Bill C. Tung | 1992-06-09 |
| 4928260 | Content addressable memory array with priority encoder | Robert L. Yau, Hiroshi Yoshida, Moon-Yee Wang | 1990-05-22 |
| 4890260 | Content addressable memory array with maskable and resettable bits | Robert L. Yau, Hiroshi Yoshida, Moon-Yee Wang | 1989-12-26 |
| 4888731 | Content addressable memory array system with multiplexed status and command information | Robert L. Yau, Hiroshi Yoshida, Moon-Yee Wang | 1989-12-19 |
| 4634894 | Low power CMOS reference generator with low impedance driver | Lee-Lean Shu, Tai-Ching Shyu | 1987-01-06 |
| 4615020 | Nonvolatile dynamic ram circuit | Darrell Rinerson | 1986-09-30 |
| 4611309 | Non-volatile dynamic RAM cell | Ron Maltiel, Robert L. Yau | 1986-09-09 |
| 4598387 | Capacitive memory signal doubler cell | George Marr | 1986-07-01 |
| 4438346 | Regulated substrate bias generator for random access memory | Paul D. Keswick, Jeffrey L. Linden | 1984-03-20 |
| 4421996 | Sense amplification scheme for random access memory | Paul D. Keswick | 1983-12-20 |