| 5121013 |
Noise reducing output buffer circuit with feedback path |
Patrick Chuang, Bill C. Tung |
1992-06-09 |
| 4928260 |
Content addressable memory array with priority encoder |
Patrick Chuang, Hiroshi Yoshida, Moon-Yee Wang |
1990-05-22 |
| 4890260 |
Content addressable memory array with maskable and resettable bits |
Patrick Chuang, Hiroshi Yoshida, Moon-Yee Wang |
1989-12-26 |
| 4888731 |
Content addressable memory array system with multiplexed status and command information |
Patrick Chuang, Hiroshi Yoshida, Moon-Yee Wang |
1989-12-19 |
| 4769784 |
Capacitor-plate bias generator for CMOS DRAM memories |
Sinan Doluca |
1988-09-06 |
| 4716552 |
Method and apparatus for non-destructive access of volatile and non-volatile data in a shadow memory array |
Ron Maltiel |
1987-12-29 |
| 4672580 |
Memory cell providing simultaneous non-destructive access to volatile and non-volatile data |
Ron Maltiel |
1987-06-09 |
| 4611309 |
Non-volatile dynamic RAM cell |
Patrick Chuang, Ron Maltiel |
1986-09-09 |