Issued Patents All Time
Showing 351–375 of 400 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5904565 | Low resistance contact between integrated circuit metal levels and method for same | Tue Nguyen | 1999-05-18 |
| 5891782 | Method for fabricating an asymmetric channel doped MOS structure | Jong-Jan Lee | 1999-04-06 |
| 5851367 | Differential copper deposition on integrated circuit surfaces and method for same | Tue Nguyen, Lawrence J. Charneski | 1998-12-22 |
| 5814537 | Method of forming transistor electrodes from directionally deposited silicide | Jer-Shen Maa | 1998-09-29 |
| 5744192 | Method of using water vapor to increase the conductivity of cooper desposited with cu(hfac)TMVS | Tue Nguyen, Yoshihide Senzaki, Masato Kobayashi, Lawrence J. Charneski | 1998-04-28 |
| 5731608 | One transistor ferroelectric memory cell and method of making the same | Jong-Jan Lee | 1998-03-24 |
| 5726459 | GE-SI SOI MOS transistor and method of fabricating same | Tatsuo Nakato | 1998-03-10 |
| 5677214 | Raised source/drain MOS transistor with covered epitaxial notches and fabrication method | — | 1997-10-14 |
| 5672530 | Method of making MOS transistor with controlled shallow source/drain junction | — | 1997-09-30 |
| 5468657 | Nitridation of SIMOX buried oxide | — | 1995-11-21 |
| 5439848 | Method for fabricating a self-aligned multi-level interconnect | Robert G. Pollachek | 1995-08-08 |
| 5430318 | BiCMOS SOI structure having vertical BJT and method of fabricating same | — | 1995-07-04 |
| 5089429 | Self-aligned emitter BiCMOS process | — | 1992-02-18 |
| 4999691 | Integrated circuit with stacked MOS field effect transistors | Doris W. Flatley | 1991-03-12 |
| 4975764 | High density BiCMOS circuits and methods of making same | — | 1990-12-04 |
| 4945070 | Method of making cmos with shallow source and drain junctions | — | 1990-07-31 |
| 4927777 | Method of making a MOS transistor | Doris W. Flatley | 1990-05-22 |
| 4841347 | MOS VLSI device having shallow junctions and method of making same | — | 1989-06-20 |
| 4797721 | Radiation hardened semiconductor device and method of making the same | — | 1989-01-10 |
| 4764482 | Method of fabricating an integrated circuit containing bipolar and MOS transistors | — | 1988-08-16 |
| 4727515 | High density programmable memory array | — | 1988-02-23 |
| 4716451 | Semiconductor device with internal gettering region | Doris W. Flatley | 1987-12-29 |
| 4692992 | Method of forming isolation regions in a semiconductor device | — | 1987-09-15 |
| 4675984 | Method of exposing only the top surface of a mesa | — | 1987-06-30 |
| 4662064 | Method of forming multi-level metallization | Doris W. Flatley, Ronald J. Johansson | 1987-05-05 |